Abstract: A spatial light modulator having two static random access memory (SRAM) devices, including a display controller configured with a display sequence, the display sequence including a first display slice and a second display slice, the first display slice having a display time less than two times a minimum time period determined by the time of a write event, and the second display slice having a display time of more than two times the minimum time period. The controller controls write events from the two SRAM devices, and the first display slice and second display slice are ordered in the display sequence so that the controller causes the spatial light modulator to output light and causes the two SRAM devices each to perform a write event during the second display slice.

Abstract: A spatial light modulator system includes an array of pixel cells each that includes two static random access memory (SRAM) devices configured to store digital data and output a first voltage signal in response to the digital data, a level shifter configured to receive the first voltage signal from at least one of the two SRAM devices and output a second voltage signal and a spatial light modulator configured to output light in an on direction or an off direction in response to the second voltage signal.

Abstract: A method and apparatus for generating addresses. The present invention provides for fast generation of a series of addresses in an array where the series comprises a column or diagonal of the array, such as for layered ECC code words in CD-ROM. Whereas each address is computable individually using multipliers and modulo circuits, the present invention operates on the series of addresses as a whole, forming a dependence between successive addresses. The dependence is separated into multiple address indices that may be summed together for the desired address. The present invention is thus able to generate a series of addresses by accumulation processes requiring only selection of the appropriate increment value and addition to a previously stored address index value. Address generation throughput is increased with savings in layout area and power.

Abstract: A method and apparatus for generating addresses. The present invention provides for fast generation of a series of addresses in an array where the series comprises a column or diagonal of the array, such as for layered ECC code words in CD-ROM. Whereas each address is computable individually using multipliers and modulo circuits, the present invention operates on the series of addresses as a whole, forming a dependence between successive addresses. The dependence is separated into multiple address indices that may be summed together for the desired address. The present invention is thus able to generate a series of addresses by accumulation processes requiring only selection of the appropriate increment value and addition to a previously stored address index value. Address generation throughput is increased with savings in layout area and power.