Patents by Inventor Alex James

Alex James has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200331692
    Abstract: The container has a blow molded piece forming a hollow plastic body. The body has a bottom and an annular side wall longitudinally extending from an annular base to a top. A thin flexible lid of foil material covers and seals a wide top opening of the container. The top is connected to the outer rim of an annular top flange. The top flange protrudes radially inward and delimit the opening at an inner rim. The lid is axially adhered to the flange upper face and can be peeled away, optionally using a pull tab that extends beyond the outer rim. Except at region of the pull tab, the annular outer edge of the lid extends parallel to the outer rim, not beyond 1.0 or 2.0 mm from the outer rim.
    Type: Application
    Filed: December 29, 2017
    Publication date: October 22, 2020
    Inventors: Alex James ORCHARD, Jonathan COLLIGNON
  • Publication number: 20200327062
    Abstract: Circuitry comprises a data store to hold status data indicating a status of a first set of one or more devices connected to the interconnect circuitry; and control circuitry, responsive to initiation of a data handling transaction, to generate recovery data indicative of an initial state of the status data and to predict a predicted revised state of the status data applicable to resolution of the data handling transaction; the control circuitry being configured to change the status data to the predicted revised state in response to initiation of the transaction and before resolution of the transaction, and in response to a request to access the status data between the change of the status data to the predicted revised state and the resolution of the transaction, to provide access to the initial state of the status data, using the recovery data.
    Type: Application
    Filed: April 12, 2019
    Publication date: October 15, 2020
    Inventors: Geoffray Matthieu LACOURBA, Andrew John TURNER, Alex James WAUGH
  • Patent number: 10800667
    Abstract: A multi-functional slurry processing system (“VARCOR”) and associated methods is disclosed. The present examples provide a multi-functional slurry processing system incorporating systems and methods for separating liquid and solid components in slurries. In particular the systems and methods described herein produce clean water, dried solids, and potential concentration of desirable constituents with a boiling point lower than water. At least one example of the multi-functional slurry processing system provides a self-contained processing facility configured to efficiently convert high water-content slurries into its constituent solid and liquid fractions and subsequently generating and collecting clean water and concentrating desirable constituents with a boiling point lower than water.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: October 13, 2020
    Assignee: SEDRON TECHNOLOGIES, LLC
    Inventors: Peter William Janicki, Sara Amber Van Tassel, John Edward Weller, Stanley James Janicki, Warren Lewis Heartwood, Keith Boyd Fackler, II, Alex James Gross, Tyler Everett Hamke, Austin George Law, Eric Christopher McBride, Ann Kate Nowinski, Liam Joseph Potocsnak, James O'Keefe Armstrong
  • Patent number: 10802969
    Abstract: An interconnect, and method of operation of such an interconnect, are disclosed. The interconnect has a plurality of nodes, and a routing network via which information is routed between the plurality of nodes. The plurality of nodes comprises at least one slave node used to couple master devices to the interconnect, at least one master node used to couple slave devices to the interconnect, and at least one control node. Each control node is responsive to a slave node request received via the routing network from a slave node, to perform an operation to service the slave node request and, when a propagation condition is present, to issue a control node request via the routing network to a chosen master node in order to service the slave node request. The chosen master node processes the control node request in order to generate a master node response, and treats as a default destination for the master node response the control node that issued the control node request.
    Type: Grant
    Filed: February 4, 2019
    Date of Patent: October 13, 2020
    Assignee: Arm Limited
    Inventors: Alex James Waugh, Geoffray Matthieu Lacourba
  • Patent number: 10788857
    Abstract: A dock for a portable electronic device includes a base and an arm movably supported on the base. The arm has a ratchet gear set and a distal end configured to engage the portable electronic device to secure the portable electronic device to the base. The dock further includes a ratchet pawl positioned within the base. The ratchet pawl is movable between a first position, in which the ratchet pawl engages the ratchet gear set to inhibit movement of the arm relative to the base, and a second position, in which the ratchet pawl disengages the ratchet gear set to allow movement of the arm relative to the base. The dock further includes an electronic actuator operable to actuate the ratchet pawl from the first position to the second position.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: September 29, 2020
    Assignee: ACCO Brands Corporation
    Inventors: Yu-Chia Huang, Alex James Klinkman
  • Publication number: 20200293233
    Abstract: Aspects of the present disclosure relate to an interconnect comprising an interface to couple to a master device, the interface comprising buffer storage. The interface is configured to receive a request from the master device for data comprising a plurality of data blocks, the master device requiring the data blocks in a defined order. A data collator is configured to: receive the request; issue a data pull request to cause the interface to allocate buffer space in the buffer storage for buffering the requested data; and responsive to receiving a confirmation that the buffer space is allocated, provide the requested data to the buffer storage. The interface is configured to employ the buffer storage to enable re-ordering of the plurality of data blocks of the requested data, prior to outputting the plurality of data blocks to the master device; and output the plurality of data blocks to the master device in the defined order.
    Type: Application
    Filed: March 14, 2019
    Publication date: September 17, 2020
    Inventors: Alex James WAUGH, Geoffray Mattheiu LACOURBA, Andrew John TURNER, Sergio SCHULER
  • Publication number: 20200280932
    Abstract: In a wireless communication between a mobile controller and a controllable device, the device periodically broadcasts, at a relatively low power level, a first advertisement packet for connecting the controllable device to a mobile controller. Once a connection has been established between the device and the controller, the controller and the device exchange their respective identifiers (IDs). In the event that the connection becomes broken, the device starts to additionally periodically broadcast, at a relatively high power level, a second advertisement packet containing the device ID for reconnecting the device to the controller. Upon receipt of the second packet, the controller requests receipt of a message containing the controller ID and, upon receipt of that message, resumes the connection with the device. The device then stops the broadcast of the second advertisement packet.
    Type: Application
    Filed: August 14, 2018
    Publication date: September 3, 2020
    Applicant: Dyson Technology Limited
    Inventors: Alan DOWN, Timothy David HUTT, Laurence Charles Richard HERBERT, Matthew HAZLEY, Alex James LAYTON, Matthew Nicholas ARANHA, Daniele PIETROBELLI
  • Patent number: 10760169
    Abstract: A method for the substantially complete conversion of hydrogenous matter to higher value product, the method comprising: (i) subjecting the hydrogenous matter to a substantially complete deconstruction process in which an aqueous phase containing a multiplicity of deconstructed compounds is produced; and (ii) contacting the aqueous phase with an anode of a microbial electrolysis cell, the anode containing a community of microbes thereon which oxidatively degrade one or more of the oxygenated organic compounds in the aqueous phase to produce protons and free electrons at the anode, wherein the protons and free electrons are transported to the cathode to produce hydrogen gas or a valuable reduced organic compound at the cathode upon application of a suitable cell potential across the anode and cathode. The invention is also directed to an apparatus for practicing the method described above.
    Type: Grant
    Filed: June 15, 2017
    Date of Patent: September 1, 2020
    Assignees: UT-Battelle, LLC, University of Tennessee Research Foundation
    Inventors: Abhijeet P. Borole, Alex James Lewis
  • Patent number: 10761897
    Abstract: A system for automatically scaling provisioned resources includes an input interface and a processor. The input interface is configured to receive an estimate of a required number of processing threads. The processor is configured to determine required resources for processing the required number of processing threads using a model; provision the required resources; indicate to execute client tasks using the provisioned resources; determine server telemetry or logging data for the provisioned resources; provide the server telemetry or the logging data to the model; determine a resource utilization score based at least in part on the server telemetry or the logging data; determine a provisioning performance reward based at least in part on the resource utilization score; and adjust model parameters using the provisioning performance reward.
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: September 1, 2020
    Assignee: Workday, Inc.
    Inventors: Montiago Xavier LaBute, Teng Qu, James Michael Stratton, Xiaoqun Joyce Duan, Alex James Boyd
  • Patent number: 10754743
    Abstract: At least one processor core has debug and non-debug modes of operation. Debug control circuitry controls operation of the at least one processor core when in the debug mode. On power up of a given processor core, the core checks a debug status value stored in a debug status storage element. When the debug status value has a first value, a debug connect sequence of messages is exchanged with the debug control circuitry over a debug interface to determine whether the given processor core should operate in the debug mode or the non-debug mode, and the debug status value is set to a second value when it is determined that the given processor core should operate in the non-debug mode. When the debug status value has the second value, the given processor core omits initiating the debug connect sequence and determines that it should operate in the non-debug mode.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: August 25, 2020
    Assignee: Arm Limited
    Inventors: Alex James Waugh, Pedro López Muñoz, Peng Wang
  • Publication number: 20200259756
    Abstract: An interconnect is provided that has a plurality of nodes, and a ring network to which each of the nodes is connected to allow packets to be transmitted between nodes. For an ordered sequence of packets one of the nodes is arranged as a source node to add each packet of the ordered sequence on to the ring network, and another of the nodes is arranged as a destination node to remove each packet of the ordered sequence from the ring network. The source node is enabled to add a packet of the ordered sequence on to the ring network without waiting for a previously added packet of the ordered sequence to be removed from the ring network by the destination node.
    Type: Application
    Filed: February 7, 2019
    Publication date: August 13, 2020
    Inventors: Geoffray Matthieu LACOURBA, Alex James WAUGH
  • Publication number: 20200250094
    Abstract: An interconnect, and method of operation of such an interconnect, are disclosed. The interconnect has a plurality of nodes, and a routing network via which information is routed between the plurality of nodes. The plurality of nodes comprises at least one slave node used to couple master devices to the interconnect, at least one master node used to couple slave devices to the interconnect, and at least one control node. Each control node is responsive to a slave node request received via the routing network from a slave node, to perform an operation to service the slave node request and, when a propagation condition is present, to issue a control node request via the routing network to a chosen master node in order to service the slave node request. The chosen master node processes the control node request in order to generate a master node response, and treats as a default destination for the master node response the control node that issued the control node request.
    Type: Application
    Filed: February 4, 2019
    Publication date: August 6, 2020
    Inventors: Alex James WAUGH, Geoffray Matthieu LACOURBA
  • Publication number: 20200230351
    Abstract: The present disclosure provides an apparatus including a first tubular housing including a first exit port and a second tubular housing including a second exit port. The apparatus also includes a third tubular housing coupled to at least one of the first tubular housing and the second tubular housing such that each of the first tubular housing, the second tubular housing, and the third tubular housing are fixed with respect to one another. The apparatus also includes a first catheter including a first plurality of outlets and is configured to be positioned at least partially within the first tubular housing. The apparatus also includes a second catheter including a second plurality of outlets and is configured to be positioned at least partially within of the second tubular housing. The apparatus also includes a pressure transducer line positioned in the third tubular housing and a pressure transducer coupled to the pressure transducer line.
    Type: Application
    Filed: October 3, 2018
    Publication date: July 23, 2020
    Inventors: Patrick W. KELLY, Joel M. WASDYKE, Roger W. MCGOWAN, Patrick A. HAVERKOST, Alex James WIEDMANN
  • Patent number: 10698969
    Abstract: The subject disclosure relates to techniques for performing an operation on a resource, based on a state of the resource, by invoking a hypertext transfer protocol (HTTP) request on a universal resource locator (URL) indicating the operation. An interface component can receive a request including an HTTP method and a URL including a first portion indicating a resource and a second portion indicating an operation. Further, an invocation component, in response to the operation being associated with the resource, can invoke the operation on the resource utilizing the HTTP method based on a state of the resource. Other embodiments relate to conditionally returning the operation within a return payload, for example, alone or within a feed, based on an applicability of the operation according to a state of an associated resource.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: June 30, 2020
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC.
    Inventors: Alex James, Michael Pizzo, Pablo Castro, Mike Flasko, Lance Olson, Jason Clark, Sid Jayadevan
  • Patent number: 10691606
    Abstract: An apparatus and method are provided for supporting multiple cache features. The apparatus provides cache storage comprising a plurality of cache ways and organised as a plurality of ways groups, where each way group comprises multiple cache ways from the plurality of cache ways. First cache feature circuitry is provided to implement a first cache feature that is applied to the way groups, and second cache feature circuitry is provided to implement a second cache feature that is applied to the way groups. Way group control circuitry is then arranged to provide a first mapping defining which cache ways belong to each way group when the first cache feature is applied to the way groups, and a second mapping defining which cache ways belong to each way group when the second cache feature is applied to the way groups.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: June 23, 2020
    Assignee: ARM Limited
    Inventors: Davide Marani, Alex James Waugh
  • Patent number: 10691511
    Abstract: A first event source generates a first indication of a first event which has occurred in the first event source, the first indication being one of a predefined set of indications corresponding to a plurality of event types. A second event source generates a second indication of a second event which has occurred in the second event source, the second indication being one of the predefined set of indications corresponding to the plurality of event types. First event selection circuitry responds to the first indication matching a selected event type of the plurality of event types to generate a first count signal and second event selection circuitry responds to the second indication matching the selected event type of the plurality of event types to generate a second count signal. Count circuitry increments a counter in response to either the first count signal or the second count signal.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: June 23, 2020
    Assignee: Arm Limited
    Inventors: Fergus Wilson MacGarry, Alex James Waugh
  • Publication number: 20200192774
    Abstract: At least one processor core has debug and non-debug modes of operation. Debug control circuitry controls operation of the at least one processor core when in the debug mode. On power up of a given processor core, the core checks a debug status value stored in a debug status storage element. When the debug status value has a first value, a debug connect sequence of messages is exchanged with the debug control circuitry over a debug interface to determine whether the given processor core should operate in the debug mode or the non-debug mode, and the debug status value is set to a second value when it is determined that the given processor core should operate in the non-debug mode. When the debug status value has the second value, the given processor core omits initiating the debug connect sequence and determines that it should operate in the non-debug mode.
    Type: Application
    Filed: December 17, 2018
    Publication date: June 18, 2020
    Inventors: Alex James WAUGH, Pedro LÓPEZ MUÑOZ, Peng WANG
  • Publication number: 20200174947
    Abstract: A data processing system (2) incorporates a first exclusive cache memory (8, 10) and a second exclusive cache memory (14). A snoop filter (18) located together with the second exclusive cache memory on one side of the communication interface (12) serves to track entries within the first exclusive cache memory. The snoop filter includes retention data storage circuitry to store retention data for controlling retention of cache entries within the second exclusive cache memory. Retention data transfer circuitry (20) serves to transfer the retention data to and from the retention data storage circuitry within the snoop filter and the second cache memory as the cache entries concerned are transferred between the second exclusive cache memory and the first exclusive cache memory.
    Type: Application
    Filed: October 19, 2016
    Publication date: June 4, 2020
    Inventors: Alex James WAUGH, Dimitrios KASERIDIS, Klas Magnus BRUCE, Michael FILIPPO, Joseph Michael PUSDESRIS, Jamshed JALAL
  • Publication number: 20200130908
    Abstract: Battery powered, keyless locking container cap configured securing a bayonet filler neck or threaded filler neck remaining unlocked after attachment. A timer circuit powers off placing the invention into an energy saving, mode; a compression spring forces a coupler into engagement. While engaged, the cap can be removed and replaced. Cap rotation by an unauthorized user, locks the cap. A backup, rotary pin coded lock is in the interior inaccessible. Cap rotation enters a pin code to unlock or lock the cap. The invention supplied is with a transmitter configured as a key fob or a cigarette lighter power plug. the transmitter signals the cap not to lock thereby providing removal. rotational Comprising rotary frictional slippage prevents unauthorized removal by limiting both speed and the rotational force to a level insufficient to override the attachment torque.
    Type: Application
    Filed: October 29, 2018
    Publication date: April 30, 2020
    Inventors: Robert Joseph Ponticelli, SR., Robert Joseph Ponticelli, JR., Alex James Dmitroff
  • Publication number: 20200136989
    Abstract: A ring interconnect system comprises a plurality of nodes. Each node is connected to two other nodes to form a ring interconnect. Every pair of nodes is connected by an inter-node path for that pair of nodes distinct from the ring interconnect. Each of the nodes comprises a message buffer to buffer messages received from at least one device associated with the node. Each of the nodes also comprises activity level circuitry to transmit an activity indication, when a number of the messages in the message buffer is equal to or above a threshold, to each other node of the plurality of nodes via the respective inter-node paths. Each of the nodes also comprises arbitrator circuitry to receive the activity indications from each other node and from the activity level circuitry, and to allow ingress of a message from the message buffer onto the ring interconnect in dependence on the activity indications.
    Type: Application
    Filed: October 25, 2018
    Publication date: April 30, 2020
    Inventors: Fergus Wilson MACGARRY, Alex James WAUGH, Andrew John TURNER