Patents by Inventor Alex Kogan
Alex Kogan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170075720Abstract: Socket scheduling modes may prevent non-uniform memory access effects from negatively affecting performance of synchronization mechanisms utilizing hardware transactional memory. Each mode may indicate whether a thread may execute a critical section on a particular socket. For example, under transitional lock elision, locks may include a mode indicating whether threads may acquire or elide the lock on a particular socket. Different modes may be used alternately to prevent threads from starving. A thread may only execute a critical section on a particular socket if allowed by the current mode. Otherwise, threads may block until allowed to execute the critical section, such as after the current mode changes. A profiling session may, for a running workload, iterate over all possible modes, measuring statistics pertaining to the execution of critical sections (e.g., the number of lock acquisitions and/or elisions), to determine the best performing modes for the particular workload.Type: ApplicationFiled: September 12, 2016Publication date: March 16, 2017Inventors: Alex Kogan, Victor M. Luchangco, Yosef Lev, Trevor Brown
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Publication number: 20170046182Abstract: Hardware transactional memory (HTM) systems may guarantee that transactions commit without falling back to non-speculative code paths. A transaction that fails to progress may enter a power mode, giving the transaction priority when it conflicts with non-power-mode transactions. If, during execution of a power-mode transaction, another thread attempts, using a non-power-mode transaction, to access a shared resource being accessed by the power-mode transaction, it may be determined whether any actual data conflict occurs between the two transactions. If no data conflict exists, both transactions may continue to completion. If, however, a data conflict does exist, the power-mode transaction may deny the other transaction access to the shared resource. HTM systems may, in some embodiments, ensure that only one power-mode transaction exists at a time. In other embodiments, multiple, concurrent, power-mode transactions may be supported while ensuring that they access disjoint data sets.Type: ApplicationFiled: July 27, 2016Publication date: February 16, 2017Inventors: Alex Kogan, David Dice, Maurice P. Herlihy
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Publication number: 20160335117Abstract: An HTM-assisted Combining Framework (HCF) may enable multiple (combiner and non-combiner) threads to access a shared data structure concurrently using hardware transactional memory (HTM). As long as a combiner executes in a hardware transaction and ensures that the lock associated with the data structure is available, it may execute concurrently with other threads operating on the data structure. HCF may include attempting to apply operations to a concurrent data structure utilizing HTM and if the HTM attempt fails, utilizing flat combining within HTM transactions. Publication lists may be used to announce operations to be applied to a concurrent data structure. A combiner thread may select a subset of the operations in the publication list and attempt to apply the selected operations using HTM. If the thread fails in these HTM attempts, it may acquire a lock associated with the data structure and apply the selected operations without HTM.Type: ApplicationFiled: May 13, 2016Publication date: November 17, 2016Inventors: Alex Kogan, Yosef Lev
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Publication number: 20160246527Abstract: Threads using hardware transactions and executing instrumented critical sections that do not perform any writes may complete as long as the thread holding the lock has not yet executed its first write operation. If the thread executing the instrumented critical section performs any writes, or if the thread holding the lock performs any writes during its critical section, the hardware transaction may be aborted. A write flag may be used to determine whether the thread holding the lock performs any writes. The thread holding the lock may set the flag before performing any write operation. The thread executing the hardware transaction may subscribe to that flag and abort the transaction if the flag is set to true, indicating that the thread holding the lock performed a write operation.Type: ApplicationFiled: February 22, 2016Publication date: August 25, 2016Inventors: Alex Kogan, Yosef Lev
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Publication number: 20160246641Abstract: Concurrent threads may be synchronized at the level of the memory words they access rather than at the level of the lock that protects the execution of critical sections. Each lock may be associated with an array of flags and each flag may indicate ownership of certain memory words. A pessimistic thread may set flags corresponding to memory words it is accessing in the critical section, while an optimistic thread may read the corresponding flag before any memory access to ensure that the flag is not and that therefore the associated memory word is not being accessed by the other thread. Thus, optimistic threads that do not have conflicts with the pessimistic thread may not have to wait for the pessimistic thread to release the lock before proceeding.Type: ApplicationFiled: February 22, 2016Publication date: August 25, 2016Inventors: Alex Kogan, David Dice, Virendra J. Marathe
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Patent number: 9424080Abstract: A multithreaded application that includes operations on a shared data structure may exploit futures to improve performance. For each operation that targets the shared data structure, a thread of the application may create a future and store it in a thread-local list of futures (under weak or medium futures linearizability policies) or in a shared queue of futures (under strong futures linearizability policies). Prior to a thread evaluating a future, type-specific optimizations may be performed on the list or queue of pending futures. For example, futures may be sorted temporally or by key, or multiple operations indicated in the futures may be combined or eliminated. During an evaluation of a future, a thread may compute the results of the operations indicated in one or more other futures. The order in which operations take effect and the optimization operations performed may be dependent on the futures linearizability policy.Type: GrantFiled: September 30, 2014Date of Patent: August 23, 2016Assignee: Oracle International CorporationInventors: Alex Kogan, Maurice P. Herlihy
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Publication number: 20160092265Abstract: A multithreaded application that includes operations on a shared data structure may exploit futures to improve performance. For each operation that targets the shared data structure, a thread of the application may create a future and store it in a thread-local list of futures (under weak or medium futures linearizability policies) or in a shared queue of futures (under strong futures linearizability policies). Prior to a thread evaluating a future, type-specific optimizations may be performed on the list or queue of pending futures. For example, futures may be sorted temporally or by key, or multiple operations indicated in the futures may be combined or eliminated. During an evaluation of a future, a thread may compute the results of the operations indicated in one or more other futures. The order in which operations take effect and the optimization operations performed may be dependent on the futures linearizability policy.Type: ApplicationFiled: September 30, 2014Publication date: March 31, 2016Applicant: Oracle International CorporationInventors: Alex Kogan, Maurice P. Herlihy
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Publication number: 20160062796Abstract: Particular techniques for improving the scalability of concurrent programs (e.g., lock-based applications) may be effective in some environments and for some workloads, but not others. The systems described herein may automatically choose appropriate ones of these techniques to apply when executing lock-based applications at runtime, based on observations of the application in the current environment and with the current workload. In one example, two techniques for improving lock scalability (e.g., transactional lock elision using hardware transactional memory, and optimistic software techniques) may be integrated together. A lightweight runtime library built for this purpose may adapt its approach to managing concurrency by dynamically selecting one or more of these techniques (at different times) during execution of a given application.Type: ApplicationFiled: November 9, 2015Publication date: March 3, 2016Applicant: ORACLE INTERNATIONAL CORPORATIONInventors: David Dice, Alex Kogan, Yosef Lev, Timothy M. Merrifield, Mark S. Moir
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Publication number: 20160011915Abstract: Transactional Lock Elision allows hardware transactions to execute unmodified critical sections protected by the same lock concurrently, by subscribing to the lock and verifying that it is available before committing the transaction. A “lazy subscription” optimization, which delays lock subscription, can potentially cause behavior that cannot occur when the critical sections are executed under the lock. Hardware extensions may provide mechanisms to ensure that lazy subscriptions are safe (e.g., that they result in correct behavior). Prior to executing a critical section transactionally, its lock and subscription code may be identified (e.g., by writing their locations to special registers). Prior to committing the transaction, the thread executing the critical section may verify that the correct lock was correctly subscribed to. If not, or if locations identified by the special registers have been modified, the transaction may be aborted.Type: ApplicationFiled: June 10, 2015Publication date: January 14, 2016Inventors: David Dice, Timothy L. Harris, Alex Kogan, Yosef Lev, Mark S. Moir
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Patent number: 9183043Abstract: Particular techniques for improving the scalability of concurrent programs (e.g., lock-based applications) may be effective in some environments and for some workloads, but not others. The systems described herein may automatically choose appropriate ones of these techniques to apply when executing lock-based applications at runtime, based on observations of the application in the current environment and with the current workload. In one example, two techniques for improving lock scalability (e.g., transactional lock elision using hardware transactional memory, and optimistic software techniques) may be integrated together. A lightweight runtime library built for this purpose may adapt its approach to managing concurrency by dynamically selecting one or more of these techniques (at different times) during execution of a given application.Type: GrantFiled: April 16, 2014Date of Patent: November 10, 2015Assignee: Oracle International CorporationInventors: David Dice, Alex Kogan, Yosef Lev, Timothy M. Merrifield, Mark S. Moir
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Publication number: 20150026688Abstract: Particular techniques for improving the scalability of concurrent programs (e.g., lock-based applications) may be effective in some environments and for some workloads, but not others. The systems described herein may automatically choose appropriate ones of these techniques to apply when executing lock-based applications at runtime, based on observations of the application in the current environment and with the current workload. In one example, two techniques for improving lock scalability (e.g., transactional lock elision using hardware transactional memory, and optimistic software techniques) may be integrated together. A lightweight runtime library built for this purpose may adapt its approach to managing concurrency by dynamically selecting one or more of these techniques (at different times) during execution of a given application.Type: ApplicationFiled: April 16, 2014Publication date: January 22, 2015Applicant: ORACLE INTERNATIONAL CORPORATIONInventors: David Dice, Alex Kogan, Yosef Lev, Timothy M. Merrifield, Mark S. Moir
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Financial reporting and auditing agent with net knowledge for extensible business reporting language
Patent number: 7856388Abstract: A system and method utilizes intelligent agents for searching, analyzing, and reporting business, financial, or non-financial information available through communication networks, particularly the Internet, regardless of inconsistencies in formats and granularity of that information. This information may then be used by users for financial and non-financial information for business decisions, developing risk profiles and credit worthiness. The intelligent agent may search Internet resources for business information of companies upon a user's request. The intelligent agent parses the retrieved information consisted with series of texts and identifies tables containing various financial statements. Each extracted table may be parsed into line items and every line item may be identified by matching to the appropriate XBRL taxonomy. Finally, the intelligent agent tags the information using XBRL taxonomy and generates financial statements in XBRL.Type: GrantFiled: August 9, 2004Date of Patent: December 21, 2010Assignee: University of KansasInventors: Rajendra P. Srivastava, Miklos Vasarhelyi, Alex Kogan -
Publication number: 20070157178Abstract: A computer-implemented method for code optimization includes collecting a profile of execution of an application program, which includes a target module, which calls one or more functions in a source module. The source and target modules may be independently-linked object files. Responsively to the profile, at least one function from the source module is identified and cloned to the target module, thereby generating an expanded target module. The expended target module is restructured so as to optimize the execution of the application program.Type: ApplicationFiled: January 4, 2006Publication date: July 5, 2007Applicant: International Business Machines CorporationInventors: Alex Kogan, Yaakov Yaari
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Patent number: 7186326Abstract: Suppressor and anti-suppressor additives in an acid copper sulfate plating bath are analyzed by the cyclic voltammetric stripping (CVS) method without cleaning or rinsing the cell between the two analyses. The suppressor analysis is performed first and the suppressor concentration in the resulting measurement solution is adjusted to a predetermined value corresponding to full suppression. This fully-suppressed solution is then used as the background electrolyte for the anti-suppressor analysis. This integrated analysis approach provides results comparable to those obtained with cell cleaning and rinsing between the analyses but significantly reduces the analysis time, consumption of expensive chemicals, and quantity of hazardous waste generated.Type: GrantFiled: May 27, 2004Date of Patent: March 6, 2007Inventors: Eugene Shalyt, Michael Pavlov, Peter Bratin, Alex Kogan, Michael James Perpich
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Publication number: 20050263399Abstract: Suppressor and anti-suppressor additives in an acid copper sulfate plating bath are analyzed by the cyclic voltammetric stripping (CVS) method without cleaning or rinsing the cell between the two analyses. The suppressor analysis is performed first and the suppressor concentration in the resulting measurement solution is adjusted to a predetermined value corresponding to full suppression. This fully-suppressed solution is then used as the background electrolyte for the anti-suppressor analysis. This integrated analysis approach provides results comparable to those obtained with cell cleaning and rinsing between the analyses but significantly reduces the analysis time, consumption of expensive chemicals, and quantity of hazardous waste generated.Type: ApplicationFiled: May 27, 2004Publication date: December 1, 2005Inventors: Eugene Shalyt, Michael Pavlov, Peter Bratin, Alex Kogan, Michael Perpich
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Patent number: 6890758Abstract: The concentration of citrate complexing agent in an electroless cobalt or nickel plating bath is determined by titrating a sample of the electroless plating bath containing a small concentration of free fluoride ion with a standard lanthanum nitrate solution. During the titration, La3+ ion first reacts preferentially with the citrate complexing agent and then with fluoride ion, which reduces the free fluoride ion concentration. The endpoint for the titration is indicated by a substantial decrease in the free fluoride ion concentration, which is detected via a fluoride ion specific electrode (ISE). The method can be used for analysis of other complexing agents.Type: GrantFiled: June 13, 2003Date of Patent: May 10, 2005Assignee: ECI Technology, Inc.Inventors: Eugene Shalyt, Michael Pavlov, Peter Bratin, Alex Kogan, Michael James Perpich
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Publication number: 20040253740Abstract: The concentration of citrate complexing agent in an electroless cobalt or nickel plating bath is determined by titrating a sample of the electroless plating bath containing a small concentration of free fluoride ion with a standard lanthanum nitrate solution. During the titration, La3+ ion first reacts preferentially with the citrate complexing agent and then with fluoride ion, which reduces the free fluoride ion concentration. The endpoint for the titration is indicated by a substantial decrease in the free fluoride ion concentration, which is detected via a fluoride ion specific electrode (ISE). The method can be used for analysis of other complexing agents.Type: ApplicationFiled: June 13, 2003Publication date: December 16, 2004Applicant: ECI Technology, Inc.Inventors: Eugene Shalyt, Michael Pavlov, Peter Bratin, Alex Kogan, Michael James Perpich
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Patent number: 6749739Abstract: Relative concentrations of active suppressor additive species and suppressor breakdown contaminants in an acid copper electroplating bath are determined by cyclic voltammetric stripping (CVS) dilution titration analysis using two negative electrode potential limits. The analysis results for the more negative potential limit provide a measure of the suppressor additive concentration alone since the suppressor breakdowvn contaminants are not effective at suppressing the copper deposition rate at the more negative potentials. The analysis results for the less negative potential limit provide a measure of the combined concentrations of the suppressor additive and the suppressor breakdown contaminants. Comparison of the results for the two analyses yields a measure of the concentration of the suppressor breakdown contaminants relative to the suppressor additive concentration.Type: GrantFiled: October 7, 2002Date of Patent: June 15, 2004Assignee: ECI Technology, Inc.Inventors: Gene Chalyt, Peter Bratin, Michael Pavlov, Alex Kogan, Michael James Perpich
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Patent number: 6733656Abstract: In the present invention, the test reference electrode used for voltammetric analysis of a plating bath is calibrated relative to the zero-current point between metal plating and stripping at a rotating platinum disk electrode in the plating bath supporting electrolyte. This calibration is readily performed during the normal course of cyclic voltammetric stripping (CVS) or cyclic pulse voltammetric stripping (CPVS) plating bath analysis the need for additional instrumentation or removal of the test reference electrode from the analysis equipment. Automatic calibration of the reference electrode enabled by the present invention, saves labor, time and expense, and minimizes errors in the plating bath analysis.Type: GrantFiled: April 3, 2002Date of Patent: May 11, 2004Assignee: ECI Technology Inc.Inventors: Gene Chalyt, Peter Bratin, Michael Pavlov, Alex Kogan, Michael James Perpich
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Publication number: 20040065561Abstract: Relative concentrations of active suppressor additive species and suppressor breakdown contaminants in an acid copper electroplating bath are determined by cyclic voltammetric stripping (CVS) dilution titration analysis using two negative electrode potential limits. The analysis results for the more negative potential limit provide a measure of the suppressor additive concentration alone since the suppressor breakdown contaminants are not effective at suppressing the copper deposition rate at the more negative potentials. The analysis results for the less negative potential limit provide a measure of the combined concentrations of the suppressor additive and the suppressor breakdown contaminants. Comparison of the results for the two analyses yields a measure of the concentration of the suppressor breakdown contaminants relative to the suppressor additive concentration.Type: ApplicationFiled: October 7, 2002Publication date: April 8, 2004Applicant: ECI TECHNOLOGY, INC.Inventors: Gene Chalyt, Peter Bratin, Michael Pavlov, Alex Kogan, Michael James Perpich