Abstract: A wafer structure (88) includes a device wafer (20) and a cap wafer (60). Semiconductor dies (22) on the device wafer (20) each include a microelectronic device (26) and terminal elements (28, 30). Barriers (36, 52) are positioned in inactive regions (32, 50) of the device wafer (20). The cap wafer (60) is coupled to the device wafer (20) and covers the semiconductor dies (22). Portions (72) of the cap wafer (60) are removed to expose the terminal elements (28, 30). The barriers (36, 52) may be taller than the elements (28, 30) and function to prevent the portions (72) from contacting the terminal elements (28, 30) when the portions (72) are removed. The wafer structure (88) is singulated to form multiple semiconductor devices (89), each device (89) including the microelectronic device (26) covered by a section of the cap wafer (60) and terminal elements (28, 30) exposed from the cap wafer (60).

Abstract: A wafer structure (88) includes a device wafer (20) and a cap wafer (60). Semiconductor dies (22) on the device wafer (20) each include a microelectronic device (26) and terminal elements (28, 30). Barriers (36, 52) are positioned in inactive regions (32, 50) of the device wafer (20). The cap wafer (60) is coupled to the device wafer (20) and covers the semiconductor dies (22). Portions (72) of the cap wafer (60) are removed to expose the terminal elements (28, 30). The barriers (36, 52) may be taller than the elements (28, 30) and function to prevent the portions (72) from contacting the terminal elements (28, 30) when the portions (72) are removed. The wafer structure (88) is singulated to form multiple semiconductor devices (89), each device (89) including the microelectronic device (26) covered by a section of the cap wafer (60) and terminal elements (28, 30) exposed from the cap wafer (60).

Abstract: In one embodiment, a semiconductor structure including a first substrate, a semiconductor device on the first substrate, a second substrate, and a conductive bond between the first substrate and the second substrate that surrounds the semiconductor device to seal the semiconductor device between the first substrate and the second substrate. The conductive bond comprises metal, silicon, and germanium. A percentage by atomic weight of silicon in the conductive bond is greater than 5%.

Abstract: A wafer structure (88) includes a device wafer (20) and a cap wafer (60). Semiconductor dies (22) on the device wafer (20) each include a microelectronic device (26) and terminal elements (28, 30). Barriers (36, 52) are positioned in inactive regions (32, 50) of the device wafer (20). The cap wafer (60) is coupled to the device wafer (20) and covers the semiconductor dies (22). Portions (72) of the cap wafer (60) are removed to expose the terminal elements (28, 30). The barriers (36, 52) may be taller than the elements (28, 30) and function to prevent the portions (72) from contacting the terminal elements (28, 30) when the portions (72) are removed. The wafer structure (88) is singulated to form multiple semiconductor devices (89), each device (89) including the microelectronic device (26) covered by a section of the cap wafer (60) and terminal elements (28, 30) exposed from the cap wafer (60).

Abstract: In one embodiment, a semiconductor structure including a first substrate, a semiconductor device on the first substrate, a second substrate, and a conductive bond between the first substrate and the second substrate that surrounds the semiconductor device to seal the semiconductor device between the first substrate and the second substrate. The conductive bond comprises metal, silicon, and germanium. A percentage by atomic weight of silicon in the conductive bond is greater than 5%.

Abstract: A method that in one embodiment is useful in bonding a first substrate to a second substrate includes forming a layer including metal over the first substrate. The layer including metal in one embodiment surrounds a semiconductor device, which can be a micro electromechanical system (MEMS) device. On the second substrate is formed a first layer comprising silicon. A second layer comprising germanium and silicon is formed on the first layer. A third layer comprising germanium is formed on the second layer. The third layer is brought into contact with the layer including metal. Heat (and pressure in some embodiments) is applied to the third layer and the layer including metal to form a mechanical bond material between the first substrate and the second substrate in which the mechanical bond material is electrically conductive. In the case of the mechanical bond surrounding a semiconductor device such as a MEMS, the mechanical bond can be particularly advantageous as a hermetic seal for protecting the MEMS.

Abstract: A wafer structure (88) includes a device wafer (20) and a cap wafer (60). Semiconductor dies (22) on the device wafer (20) each include a microelectronic device (26) and terminal elements (28, 30). Barriers (36, 52) are positioned in inactive regions (32, 50) of the device wafer (20). The cap wafer (60) is coupled to the device wafer (20) and covers the semiconductor dies (22). Portions (72) of the cap wafer (60) are removed to expose the terminal elements (28, 30). The barriers (36, 52) may be taller than the elements (28, 30) and function to prevent the portions (72) from contacting the terminal elements (28, 30) when the portions (72) are removed. The wafer structure (88) is singulated to form multiple semiconductor devices (89), each device (89) including the microelectronic device (26) covered by a section of the cap wafer (60) and terminal elements (28, 30) exposed from the cap wafer (60).

Abstract: A polishing pad can include a first layer and a second layer. The first layer can have a first polishing surface and a first opening. The second layer can have an attaching surface and a second opening substantially contiguous with the first opening. The polishing pad can further include, a pad window lying within the first opening. The pad window can include a second polishing surface. When the pad would be attached to a platen, the first and second polishing surfaces can lie along a same plane, and an opposing surface of the pad window can abut an exterior surface of a platen window. In another aspect, a polishing apparatus can include an exterior surface of a platen window abutting the polishing pad. In still another aspect, a process of polishing can include polishing a workpiece such that the pad window contacts the workpiece and the platen window simultaneously.

Abstract: A method that in one embodiment is useful in bonding a first substrate to a second substrate includes forming a layer including metal over the first substrate. The layer including metal in one embodiment surrounds a semiconductor device, which can be a micro electromechanical system (MEMS) device. On the second substrate is formed a first layer comprising silicon. A second layer comprising germanium and silicon is formed on the first layer. A third layer comprising germanium is formed on the second layer. The third layer is brought into contact with the layer including metal. Heat (and pressure in some embodiments) is applied to the third layer and the layer including metal to form a mechanical bond material between the first substrate and the second substrate in which the mechanical bond material is electrically conductive. In the case of the mechanical bond surrounding a semiconductor device such as a MEMS, the mechanical bond can be particularly advantageous as a hermetic seal for protecting the MEMS.

Abstract: A polish pad (120) and platen (130) assembly for use in chemical mechanical polishing of semiconductor devices includes a platen (130) having a grooved or channeled surface (136) which is sealed from the processing environment by an ungrooved portion (131) at the periphery of the platen (130). In addition, the platen (130) includes one or more passageways (132) that provide a pathway to ambient or sub-ambient environment. The combination of the sealing region (131) and the passageway(s) (132) prevent liquids, vapors or other undesirable contaminants from infiltrating between the pad and platen, and also vent trapped air pockets between the pad and platen.

Abstract: A polish pad (40, 42) and platen (50) assembly for use in chemical mechanical polishing of semiconductor devices includes a platen (50) having a vented endpoint window (62, 72, 82) with one or more venting passageways (e.g., 64, 66) and/or a grooved or channeled platen surface (176) to prevent air pressure buildup in the air gap (46) by discharging or venting air through one or more vent pathways (52) formed in the platen to provide a pathway to ambient or sub-ambient environment. The air permeable construction of the vented endpoint window (72) provides pressure relief for the air gap (46) between the pad endpoint window (44) and the vented endpoint window (72), but may also include passages (75, 76) that are filled with an air permeable hydrophobic material which protects the underlying endpoint detection system (30, 32) from contamination during cleaning of the platen endpoint window (72).

Abstract: A polishing pad can include a first layer and a second layer. The first layer can have a first polishing surface and a first opening. The second layer can have an attaching surface and a second opening substantially contiguous with the first opening. The polishing pad can further include, a pad window lying within the first opening. The pad window can include a second polishing surface. When the pad would be attached to a platen, the first and second polishing surfaces can lie along a same plane, and an opposing surface of the pad window can abut an exterior surface of a platen window. In another aspect, a polishing apparatus can include an exterior surface of a platen window abutting the polishing pad. In still another aspect, a process of polishing can include polishing a workpiece such that the pad window contacts the workpiece and the platen window simultaneously.

Abstract: A polishing pad can include a first layer and a second layer. The first layer can have a first polishing surface and a first opening. The second layer can have an attaching surface and a second opening substantially contiguous with the first opening. The polishing pad can further include, a pad window lying within the first opening. The pad window can include a second polishing surface. When the pad would be attached to a platen, the first and second polishing surfaces can lie along a same plane, and an opposing surface of the pad window can abut an exterior surface of a platen window. In another aspect, a polishing apparatus can include an exterior surface of a platen window abutting the polishing pad. In still another aspect, a process of polishing can include polishing a workpiece such that the pad window contacts the workpiece and the platen window simultaneously.

Abstract: A polishing pad can include a first layer and a second layer. The first layer can have a first polishing surface and a first opening. The second layer can have an attaching surface and a second opening substantially contiguous with the first opening. The polishing pad can further include a pad window lying within the first opening. The pad window can include a second polishing surface and a gas-permeable material. In one aspect, an apparatus can include an attaching surface of a platen lying adjacent to the attaching surface of the polishing pad. In another aspect, a process for polishing can include changing a temperature of a gas within a spaced-apart region formed between a pad and a platen. The process can also include forming a gas flux across the polishing pad after polishing has started.

Abstract: A polishing carrier head including a retaining ring for defining an area of a polishing pocket region used to polish a predetermined object, is provided. The polishing carrier head may further include a perforated plate positioned lateral to the retaining ring, the perforated plate having a plurality of perforations for permitting fluid flow. The polishing carrier head may further include a flexible membrane having a first region overlying a portion of the retaining ring and the perforated plate and a second region in which a first portion of the flexible membrane overlies a second portion of the flexible membrane to form one or more bellows. The polishing carrier head may further include an edge support ring in contact with the first region of the flexible membrane for clamping the first region of the flexible membrane to the perforated plate.