Abstract: A method fabricating a GaN based sensor including: forming a gate dielectric layer over a GaN hetero-structure including a GaN layer formed over a substrate and a first barrier layer formed over the GaN layer; forming a first mask over the gate dielectric layer; etching the gate dielectric layer and the first barrier layer through the first mask, thereby forming source and drain contact openings; removing the first mask; forming a metal layer over the gate dielectric layer, wherein the metal layer extends into the source and drain contact openings; forming a second mask over the metal layer; etching the metal layer, the gate dielectric layer and the GaN heterostructure through the second mask, wherein a region of the GaN heterostructure is exposed; and thermally activating the metal layer in the source and drain contact openings. The gate dielectric may exhibit a sloped profile, and dielectric spacers may be formed.

Abstract: A method fabricating a GaN based sensor including: forming a gate dielectric layer over a GaN hetero-structure including a GaN layer formed over a substrate and a first barrier layer formed over the GaN layer; forming a first mask over the gate dielectric layer; etching the gate dielectric layer and the first barrier layer through the first mask, thereby forming source and drain contact openings; removing the first mask; forming a metal layer over the gate dielectric layer, wherein the metal layer extends into the source and drain contact openings; forming a second mask over the metal layer; etching the metal layer, the gate dielectric layer and the GaN heterostructure through the second mask, wherein a region of the GaN heterostructure is exposed; and thermally activating the metal layer in the source and drain contact openings. The gate dielectric may exhibit a sloped profile, and dielectric spacers may be formed.

Abstract: A method fabricating a GaN based sensor including: forming a gate dielectric layer over a GaN hetero-structure including a GaN layer formed over a substrate and a first barrier layer formed over the GaN layer; forming a first mask over the gate dielectric layer; etching the gate dielectric layer and the first barrier layer through the first mask, thereby forming source and drain contact openings; removing the first mask; forming a metal layer over the gate dielectric layer, wherein the metal layer extends into the source and drain contact openings; forming a second mask over the metal layer; etching the metal layer, the gate dielectric layer and the GaN heterostructure through the second mask, wherein a region of the GaN heterostructure is exposed; and thermally activating the metal layer in the source and drain contact openings. The gate dielectric may exhibit a sloped profile, and dielectric spacers may be formed.

Abstract: A method fabricating a GaN based sensor including: forming a gate dielectric layer over a GaN hetero-structure including a GaN layer formed over a substrate and a first barrier layer formed over the GaN layer; forming a first mask over the gate dielectric layer; etching the gate dielectric layer and the first barrier layer through the first mask, thereby forming source and drain contact openings; removing the first mask; forming a metal layer over the gate dielectric layer, wherein the metal layer extends into the source and drain contact openings; forming a second mask over the metal layer; etching the metal layer, the gate dielectric layer and the GaN heterostructure through the second mask, wherein a region of the GaN heterostructure is exposed; and thermally activating the metal layer in the source and drain contact openings. The gate dielectric may exhibit a sloped profile, and dielectric spacers may be formed.

Abstract: A method for manufacturing a semiconductor device, the method may include forming a first part of a hollow in first part of a first layer of the semiconductor device and coating a sidewall of the first part of the hollow with an etch stop material, wherein the forming of the first part of the hollow comprises performing at least one iteration of (i) anisotropic etching and (ii) deposition of the etch stop material; wherein when completed, the semiconductor device comprises a radio frequency (RF) circuit; forming a second part of the hollow in a second part of the first layer by performing isotropic etching that involves directing plasma through the first part of the hollow; wherein the second part of the hollow reaches either (a) a bottom of a second layer of the semiconductor device or (b) the RF circuit; and wherein at least a majority of the second part of the hollow is wider than at least a majority of the first part of the hollow.

Abstract: A method for manufacturing a semiconductor device, the method may include forming a first part of a hollow in first part of a first layer of the semiconductor device and coating a sidewall of the first part of the hollow with an etch stop material, wherein the forming of the first part of the hollow comprises performing at least one iteration of (i) anisotropic etching and (ii) deposition of the etch stop material; wherein when completed, the semiconductor device comprises a radio frequency (RF) circuit; forming a second part of the hollow in a second part of the first layer by performing isotropic etching that involves directing plasma through the first part of the hollow; wherein the second part of the hollow reaches either (a) a bottom of a second layer of the semiconductor device or (b) the RF circuit; and wherein at least a majority of the second part of the hollow is wider than at least a majority of the first part of the hollow.