Abstract: Protection circuitry configured to protect an electrical load from both overvoltage and overcurrent and includes a recovery period timer configured to set a recovery time. The recovery time allows a system, including a power supply, voltage regulator, protection circuitry and electrical load to dissipate heat and reset components. The protection circuitry is configured to monitor downstream performance of the electrical load and disconnect upstream power based on a downstream failure or other performance characteristics. The protection circuitry may include a downstream overvoltage sensing circuit that controls a current source. The current source injects current into an overcurrent protection loop in the protection circuitry that includes the configurable recovery period timer. In this manner both an overvoltage and an overcurrent event may take advantage of the configurable recovery period timer without the need for a separate time delay circuit.

Abstract: Protection circuitry configured to protect an electrical load from both overvoltage and overcurrent and includes a recovery period timer configured to set a recovery time. The recovery time allows a system, including a power supply, voltage regulator, protection circuitry and electrical load to dissipate heat and reset components. The protection circuitry is configured to monitor downstream performance of the electrical load and disconnect upstream power based on a downstream failure or other performance characteristics. The protection circuitry may include a downstream overvoltage sensing circuit that controls a current source. The current source injects current into an overcurrent protection loop in the protection circuitry that includes the configurable recovery period timer. In this manner both an overvoltage and an overcurrent event may take advantage of the configurable recovery period timer without the need for a separate time delay circuit.

Abstract: A transient voltage suppression circuit includes a voltage suppression circuit, a switch activation circuit, and a solid-state switch. The switch activation circuit is configured to selectively supply a switch activation signal. The solid-state switch is electrically connected in series with the voltage suppression circuit, is coupled to receive the switch activation signal selectively supplied by the switch activation circuit, and is configured, in response to the switch activation signal, to switch from an OFF state to an ON state.

Abstract: Apparatus for protecting a signal line bus driver from overvoltage faults may include a first solid-state switch configured to block current having a positive voltage when open and a second solid-state switch configured to block current having a negative voltage when open. A comparator circuit may produce a output signal responsively to presence of a fault-induced voltage in the signal line that has a magnitude that exceeds the reference voltage. The first and second switches may be connected in series with one another and with the bus driver. The switches may be interposed between the bus driver and an output end of the signal line and may responsively to the comparator circuit output signal.

Abstract: A transient voltage suppression circuit includes a voltage suppression circuit, a switch activation circuit, and a solid-state switch. The switch activation circuit is configured to selectively supply a switch activation signal. The solid-state switch is electrically connected in series with the voltage suppression circuit, is coupled to receive the switch activation signal selectively supplied by the switch activation circuit, and is configured, in response to the switch activation signal, to switch from an OFF state to an ON state.

Abstract: Apparatus for protecting a signal line bus driver from overvoltage faults may include a first solid-state switch configured to block current having a positive voltage when open and a second solid-state switch configured to block current having a negative voltage when open. A comparator circuit may produce a output signal responsively to presence of a fault-induced voltage in the signal line that has a magnitude that exceeds the reference voltage. The first and second switches may be connected in series with one another and with the bus driver. The switches may be interposed between the bus driver and an output end of the signal line and may responsively to the comparator circuit output signal.

Abstract: A low-side driver circuit includes a low-side driver integrated circuit and a controllable switch. The low-side driver integrated circuit is responsive to an on-off command input signal to selectively operate in an ON mode and an OFF mode. The controllable switch is responsive to the on-off command signal to selectively operate in a CLOSED mode and an OPEN mode. The low-side driver integrated circuit and the controllable switch are configured to simultaneously operate in the ON mode and the CLOSED mode, respectively, and in the OFF mode and the OPEN mode, respectively. During a voltage transient the potential will be realized across the controllable switch, thus protecting the lower voltage rated low-side integrated circuit.

Abstract: A low-side driver circuit includes a low-side driver integrated circuit and a controllable switch. The low-side driver integrated circuit is responsive to an on-off command input signal to selectively operate in an ON mode and an OFF mode. The controllable switch is responsive to the on-off command signal to selectively operate in a CLOSED mode and an OPEN mode. The low-side driver integrated circuit and the controllable switch are configured to simultaneously operate in the ON mode and the CLOSED mode, respectively, and in the OFF mode and the OPEN mode, respectively. During a voltage transient the potential will be realized across the controllable switch, thus protecting the lower voltage rated low-side integrated circuit.

Abstract: A precision digital to analog conversion circuit and method are provided. A regulated direct current (DC) voltage having a DC voltage magnitude is supplied to a device, such as a processor. The processor generates a pulse width modulation (PWM) output signal based, at least in part, on the regulated DC voltage. An analog output signal is generated from the PWM output signal. The regulated DC voltage is compared to a precision reference DC voltage, the DC voltage magnitude is selectively adjusted based on the comparison.

Abstract: A precision digital to analog conversion circuit and method are provided. A regulated direct current (DC) voltage having a DC voltage magnitude is supplied to a device, such as a processor. The processor generates a pulse width modulation (PWM) output signal based, at least in part, on the regulated DC voltage. An analog output signal is generated from the PWM output signal. The regulated DC voltage is compared to a precision reference DC voltage, the DC voltage magnitude is selectively adjusted based on the comparison.