Abstract: A memory matrix comprises a plurality of word lines, a plurality of bit lines, and a stacked diode and voltage-variable resistor structure interconnecting bit lines to word lines. The stacked diode and voltage-variable resistor structure includes a doped region in a semiconductor substrate defining a work line, a doped polycrystalline silicon layer over said word line and forming a p-n junction therewith, and an amorphized region in the doped polycrystalline silicon layer having increased resistance over the non-amorphized portion of the doped polycrystalline silicon layer. A contact is made to the amorphized polycrystalline silicon material which preferably includes a titanium-tungsten barrier layer and an aluminum layer over the barrier layer.

Abstract: An electrically programmable element is fabricated in a P-N junction isolated region of a semiconductor body by first extending the depth of the region in the body by introducing dopants through the region into the body by ion implantation or by diffusion and drive-in, and thereafter forming an amorphotized layer in the first region overlying the extended portion. The increased depth of the first region provided by the second region prevents damage to the P-N junction between the semiconductor body and the first region during formation of the amorphotized layer.