Patents by Inventor Alexander BURLAK

Alexander BURLAK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit degradation estimation and time-of-failure prediction using workload and margin sensing
    Patent number: 11740281
    Abstract: An integrated circuit (IC) comprising: a margin measurement circuit configured to monitor multiple data paths of the IC and to output, at different times, different ranges of remaining margins of the multiple data paths; a workload sensor configured to output a value representing aggregate operational stress experienced by the IC over a period of time ending at each of the different times; and a processor configured to: (i) compute, based on the value output by said workload sensor, an upper bound and a lower bound of change of the remaining margin of the IC, and (ii) compute upper and lower bounds of a current remaining margin of the IC, based on (a) the upper and lower bounds of change, and (b) a remaining margin indicated by a border between two adjacent ranges outputted by the margin measurement circuit.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: August 29, 2023
    Assignee: PROTEANTECS LTD.
    Inventors: Eyal Fayneh, Edi Shmueli, Alexander Burlak, Evelyn Landman, Inbar Weintrob, Yahel David, Shai Cohen, Guy Redler
  • INTEGRATED CIRCUIT DEGRADATION ESTIMATION AND TIME-OF-FAILURE PREDICTION USING WORKLOAD AND MARGIN SENSING
    Publication number: 20220260630
    Abstract: An integrated circuit (IC) comprising: a margin measurement circuit configured to monitor multiple data paths of the IC and to output, at different times, different ranges of remaining margins of the multiple data paths; a workload sensor configured to output a value representing aggregate operational stress experienced by the IC over a period of time ending at each of the different times; and a processor configured to: (i) compute, based on the value output by said workload sensor, an upper bound and a lower bound of change of the remaining margin of the IC, and (ii) compute upper and lower bounds of a current remaining margin of the IC, based on (a) the upper and lower bounds of change, and (b) a remaining margin indicated by a border between two adjacent ranges outputted by the margin measurement circuit.
    Type: Application
    Filed: March 24, 2022
    Publication date: August 18, 2022
    Inventors: Eyal FAYNEH, Edi SHMUELI, Alexander BURLAK, Evelyn LANDMAN, Inbar WEINTROB, Yahel DAVID, Shai COHEN, Guy REDLER