Patents by Inventor Alexander C. Kontos

Alexander C. Kontos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220189772
    Abstract: A method for patterning structures including providing a layer stack having a plurality of device layers and a hardmask layer disposed in a stacked arrangement, the layer stack having a plurality of trenches formed therein, the trenches extending through the hardmask layer and into at least one of the device layers, the trenches having lateral sidewalls with a first slope relative to a plane perpendicular to upper surfaces of the device layers, and performing a sputter etching process wherein ion beams are directed toward the hardmask layer to etch the hardmask layer and cause etched material from the hardmask layer to be redistributed along the lateral sidewalls of the trenches to provide the lateral sidewalls with a second slope relative to the plane perpendicular to the upper surfaces of the device layers, the second slope less than the first slope.
    Type: Application
    Filed: December 15, 2020
    Publication date: June 16, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Shurong Liang, Alexander C. Kontos, Il-Woong Koo
  • Patent number: 11270864
    Abstract: Disclosed herein are approaches for adjusting extraction slits of an extraction plate using a set of adjustable beam blockers. In one approach, an ion extraction optics may include an extraction plate including a first opening and a second opening, and a first beam blocker extending over the first opening and a second beam blocker extending over the second opening. Each of the first and second beam blockers may include an inner slit defined by a first distance between an inner edge and the extraction plate, and an outer slit defined by a second distance between an outer edge and the extraction plate, wherein the first and second beam blockers are movable to vary at least one of the first distance and the second distance. As a result, extraction through the inner and outer slits of ion beamlets characterized by similar mean angles may be achieved.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: March 8, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Costel Biloiu, Adam Calkins, Alexander C. Kontos, James J. Howarth
  • Publication number: 20210305001
    Abstract: Disclosed herein are approaches for adjusting extraction slits of an extraction plate using a set of adjustable beam blockers. In one approach, an ion extraction optics may include an extraction plate including a first opening and a second opening, and a first beam blocker extending over the first opening and a second beam blocker extending over the second opening. Each of the first and second beam blockers may include an inner slit defined by a first distance between an inner edge and the extraction plate, and an outer slit defined by a second distance between an outer edge and the extraction plate, wherein the first and second beam blockers are movable to vary at least one of the first distance and the second distance. As a result, extraction through the inner and outer slits of ion beamlets characterized by similar mean angles may be achieved.
    Type: Application
    Filed: March 24, 2020
    Publication date: September 30, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Costel Biloiu, Adam Calkins, Alexander C. Kontos, James J. Howarth
  • Patent number: 10312432
    Abstract: A method may include: providing a device stack, the device stack comprising sidewall portions and extending above a substrate base, the device stack further including a plurality of metal layers; depositing an interface layer conformally over the device stack using an atomic layer deposition process, the interface layer comprising a first insulator material; depositing an encapsulation layer on the interface layer, the encapsulation layer comprising a second insulator material; and depositing an interlevel dielectric disposed on the encapsulation layer, the interlevel dielectric comprising a third insulator material.
    Type: Grant
    Filed: April 6, 2016
    Date of Patent: June 4, 2019
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Tsung-Liang Chen, Shurong Liang, Alexander C. Kontos
  • Patent number: 9865433
    Abstract: A gas injection system, including an extraction plate having an extraction aperture for allowing passage of an ion beam through the extraction plate, the extraction plate further having a gas slot for expulsion of a residue removal gas from the extraction plate. The gas injection system may include a gas conduit extending through the extraction plate between the gas slot and a gas manifold, a gas source connected in fluid communication with the gas manifold, the gas source containing the residue removal gas. The gas manifold may include a valve adjustable between a first position, wherein the residue removal gas is allowed to flow into the extraction plate, and a second portion, wherein the residue removal gas can be vented from the extraction plate. The gas injection system may further include a manifold cover coupled to the gas manifold.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: January 9, 2018
    Assignee: Varian Semiconductor Equipment Associats, Inc.
    Inventors: Jay Wallace, Ernest E. Allen, Richard J. Hertel, Alexander C. Kontos, Shurong Liang, Jeffrey E. Krampert, Tyler Rockwell
  • Publication number: 20170294569
    Abstract: A method may include: providing a device stack, the device stack comprising sidewall portions and extending above a substrate base, the device stack further including a plurality of metal layers; depositing an interface layer conformally over the device stack using an atomic layer deposition process, the interface layer comprising a first insulator material; depositing an encapsulation layer on the interface layer, the encapsulation layer comprising a second insulator material; and depositing an interlevel dielectric disposed on the encapsulation layer, the interlevel dielectric comprising a third insulator material.
    Type: Application
    Filed: April 6, 2016
    Publication date: October 12, 2017
    Inventors: Tsung-Liang Chen, Shurong Liang, Alexander C. Kontos
  • Patent number: 9704528
    Abstract: In one embodiment, a system for treating a magnetic layer includes an ion source to generate an ion beam containing ions of a desired species. The system may also include a magnetic alignment apparatus downstream of the ion source and proximate to the substrate, wherein the magnetic alignment apparatus is operable to apply a magnetic field to the magnetic layer in the substrate along a direction out of plane relative to the magnetic layer.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: July 11, 2017
    Assignee: Varian Semiconductor Equipment Associates, Inc
    Inventors: Alexander C. Kontos, Frank Sinclair, Rajesh Dorai
  • Patent number: 9093104
    Abstract: A novel technique for manufacturing bit patterned media is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for manufacturing bit pattern media. The technique, which may be realized as a method comprising: forming a non-catalysis region on a first portion of a catalysis layer; forming a non-magnetic separator on the non-catalysis region; and forming a magnetic active region on a second portion of the catalysis layer adjacent to the first portion of the catalysis layer.
    Type: Grant
    Filed: January 3, 2012
    Date of Patent: July 28, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Frank Sinclair, Julian G. Blake, Helen L. Maynard, Alexander C. Kontos
  • Patent number: 9082949
    Abstract: A method of forming a magnetic memory includes providing a layer stack comprising a plurality of magnetic layers and a plurality of electrically conducting layers on a base portion of a substrate; forming a first mask feature on an outer surface of the layer stack above a first protected region and a second mask feature on the outer surface of the layer stack above a second protected region, the first mask feature and second mask feature defining an exposed region of the layer stack in portions of the layer stack therebetween; and directing ions towards exposed the region of the layer stack in an ion exposure that is effective to magnetically isolate the first protected region from the second protected region and to electrically isolate the first protected region from the second protected region without removal of the exposed region of the layer stack.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: July 14, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Alexander C. Kontos, Steven Sherman, John J. Hautala, Simon Ruffell
  • Patent number: 8946836
    Abstract: In one embodiment a magnetic memory includes a memory device base and a plurality of memory cells disposed on the memory cell base, where each memory cell includes a layer stack comprising a plurality of magnetic and electrically conductive layers arranged in a stack of layers common to each other memory cell. The magnetic memory further includes an implanted matrix disposed between the memory cells and surrounding each memory cell, where the implanted matrix includes component material of the layer stack of each memory cell inter mixed with implanted species, where the implanted matrix comprises a non-conducting material and a non-magnetic material, wherein each memory cell is electrically and magnetically isolated from each other memory cell.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: February 3, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Alexander C. Kontos, Steven Sherman, John J. Hautala, Simon Ruffell
  • Publication number: 20140272180
    Abstract: In one embodiment, a system for treating a magnetic layer includes an ion source to generate an ion beam containing ions of a desired species. The system may also include a magnetic alignment apparatus downstream of the ion source and proximate to the substrate, wherein the magnetic alignment apparatus is operable to apply a magnetic field to the magnetic layer in the substrate along a direction out of plane relative to the magnetic layer.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Inventors: Alexander C. Kontos, Frank Sinclair, Rajesh Dorai
  • Publication number: 20140272181
    Abstract: In one embodiment, a system for treating a magnetic layer includes an ion generating apparatus for directing an ion beam to the substrate and a magnetic alignment apparatus downstream of the ion generating apparatus and proximate to the substrate and operative to generate a magnetic field that intercepts the substrate in an out of plane orientation with respect to a plane of the substrate. The magnetic alignment apparatus and ion generating apparatus generate a process region in which the ion beam and magnetic field overlap.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Inventors: Alexander C. Kontos, Frank Sinclair, Rajesh Dorai
  • Patent number: 8830616
    Abstract: A write head for a magnetic storage device includes a writing tip comprising a magnetic material, a write pulse generator configured to generate a write pulse signal comprising a varying voltage bias between the magnetic storage device and the writing tip. The write pulse signal comprising one or more write pulses effective to tunnel electrons from the writing tip to the magnetic storage device. The data stream generator configured to provide a data stream signal to the writing tip where the data stream signal is operative to vary spin polarity in the electrons from a first polarity to a second polarity.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: September 9, 2014
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Frank Sinclair, Alexander C. Kontos, Rajesh Dorai
  • Patent number: 8679356
    Abstract: A method of patterning a substrate, comprises patterning a photoresist layer disposed on the substrate using imprint lithography and etching exposed portions of a hard mask layer disposed between the patterned photoresist layer and the substrate. The method may also comprise implanting ions into a magnetic layer in the substrate while the etched hard mask layer is disposed thereon.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: March 25, 2014
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Alexander C. Kontos, Frank Sinclair, Anthony Renau
  • Publication number: 20130285177
    Abstract: In one embodiment a magnetic memory includes a memory device base and a plurality of memory cells disposed on the memory cell base, where each memory cell includes a layer stack comprising a plurality of magnetic and electrically conductive layers arranged in a stack of layers common to each other memory cell. The magnetic memory further includes an implanted matrix disposed between the memory cells and surrounding each memory cell, where the implanted matrix includes component material of the layer stack of each memory cell inter mixed with implanted species, where the implanted matrix comprises a non-conducting material and a non-magnetic material, wherein each memory cell is electrically and magnetically isolated from each other memory cell.
    Type: Application
    Filed: April 29, 2013
    Publication date: October 31, 2013
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Alexander C. Kontos, Steven Sherman, John J. Hautala, Simon Ruffell
  • Publication number: 20130288394
    Abstract: A method of forming a magnetic memory includes providing a layer stack comprising a plurality of magnetic layers and a plurality of electrically conducting layers on a base portion of a substrate; forming a first mask feature on an outer surface of the layer stack above a first protected region and a second mask feature on the outer surface of the layer stack above a second protected region, the first mask feature and second mask feature defining an exposed region of the layer stack in portions of the layer stack therebetween; and directing ions towards exposed the region of the layer stack in an ion exposure that is effective to magnetically isolate the first protected region from the second protected region and to electrically isolate the first protected region from the second protected region without removal of the exposed region of the layer stack.
    Type: Application
    Filed: April 29, 2013
    Publication date: October 31, 2013
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Alexander C. Kontos, Steven Sherman, John J. Hautala, Simon Ruffell
  • Publication number: 20120292285
    Abstract: A method of patterning a substrate, comprises patterning a photoresist layer disposed on the substrate using imprint lithography and etching exposed portions of a hard mask layer disposed between the patterned photoresist layer and the substrate. The method may also comprise implanting ions into a magnetic layer in the substrate while the etched hard mask layer is disposed thereon.
    Type: Application
    Filed: May 19, 2011
    Publication date: November 22, 2012
    Inventors: Alexander C. Kontos, Frank Sinclair, Anthony Renau
  • Publication number: 20120280442
    Abstract: A media carrier, adapted to hold a plurality of pieces of magnetic media, is disclosed. This media carrier can be placed on the workpiece support, or platen, allowing the magnetic media to be processed. In some embodiments, the media carrier is designed such that only one side of the magnetic media is exposed, requiring a robot or other equipment to invert each piece of media in the carrier to process the second side. In other embodiments, the media carrier is designed such that both sides of the magnetic media are exposed. In this scenario, the media carrier is inverted on the platen to allow processing of the second side.
    Type: Application
    Filed: May 5, 2011
    Publication date: November 8, 2012
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Richard J. Hertel, Julian G. Blake, Edward D. MacIntosh, Alexander C. Kontos, Frank Sinclair, Christopher A. Rowland, Mayur Jagtap, Sankar Ganesh Kolappan
  • Publication number: 20120175342
    Abstract: A novel, technique: for manufacturing bit patterned media is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for manufacturing hit pattern media. The technique, which may be realized as a method comprising: forming a non-catalysis region on a first portion of a catalysis layer; forming a non-magnetic separator on the non-catalysis region; and forming a magnetic active region on it second portion of the catalysis layer adjacent to the first portion of the catalysis layer.
    Type: Application
    Filed: January 3, 2012
    Publication date: July 12, 2012
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Frank Sinclair, Julian G. Blake, Helen L. Maynard, Alexander C. Kontos