Patents by Inventor Alexander C. Stange
Alexander C. Stange has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250085254Abstract: The present disclosure provides a sensor assembly for detecting the presence of at least one amplification product of an isothermal amplification process (i.e., an isothermal nucleic acid amplification process). The sensor assembly includes a first sensor responsive to the detection of an indicator of the presence of at least one amplification product to provide a first signal, the first sensor comprising a sensing surface arranged to contact a sample in the amplification product receiving region, the sensing surface comprises a first layer comprising a one-dimensional or two-dimensional material. Alternatively or additionally, the disclosure provides a pH sensor comprising a sensing surface comprising a first layer comprising a one-dimensional or two-dimensional material.Type: ApplicationFiled: December 6, 2022Publication date: March 13, 2025Inventors: Hari CHAUHAN, Alexander C. STANGE, Mohamed AZIZE
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Publication number: 20240094154Abstract: The present disclosure provides a method of fabricating a sensor assembly in which a sensor surface has an anchor species provided thereon, the anchor species having a first functional group attached. The method further comprises disposing a fluid channel over the surface and subsequently providing an analyte capture species to the fluid channel. The analyte capture species comprises a second functional group configured to react with the first functional group. The surface is then exposed to photo radiation and the first and second functional groups react forming a link between the analyte capture species and the anchor species on the sensing surface.Type: ApplicationFiled: March 24, 2023Publication date: March 21, 2024Inventors: Alexander C. STANGE, Mohamed AZIZE, Hari CHAUHAN
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Publication number: 20240094200Abstract: The present disclosure provides a method of fabricating a target capture and sensor assembly. The method comprises the steps of: providing a fluid path with a target capture surface comprising an anchor species with a first functional group disposed thereon; providing a target capture species to the target capture surface of the fluid path, wherein each target capture species comprises a target capture part and a second functional group configured to react with the first functional group; and exposing at least a portion of the target capture surface of the fluid path to photo radiation so as to cause a photo-initiated reaction between the first functional group and the second functional group, wherein the target capture and sensor assembly further comprises a sensing surface in the fluid path and wherein the target capture surface and the sensing surface are in fluid communication with one another.Type: ApplicationFiled: September 16, 2022Publication date: March 21, 2024Applicant: Analog Devices, Inc.Inventors: Alexander C. STANGE, Mohamed AZIZE, Hari CHAUHAN
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Patent number: 10476659Abstract: A system can include a digital oversampler configured to oversample an input data stream; a rate generator configured to select a frequency that is not less than an expected frequency of the input data stream; a rate generator clock of the rate generator configured to output a clock signal that has the selected frequency; a sample receiver configured to receive at least one sample of the input data stream from the digital oversampler; a sample counter configured to be incremented by each received sample responsive to a determination that the sample receiver has received at least one sample of the input data stream from the digital oversampler; a sample rate converter configured to accumulate samples from the sample receiver at the rate of a “toothless” clock signal, wherein the sample counter is configured to be decremented by the “toothless” clock signal at the selected frequency responsive to a determination that the sample receiver has not received at least one sample of the input data stream from the digiType: GrantFiled: July 30, 2018Date of Patent: November 12, 2019Assignee: AVNERA CORPORATIONInventors: Samuel J. Peters, II, Eric P. Etheridge, Victor Lee Hansen, Alexander C. Stange
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Patent number: 10425053Abstract: A Class G amplifier system including a processing unit configured to receive an input signal and output a delayed processed input signal, a class G amplifier configured to receive the delayed processed input signal, and a power supply. The power supply includes a regulator configured to operate in a plurality of configurations, each configuration outputs a different supply voltage to the class G amplifier and a control circuit configured to receive the input signal and determine the supply voltage required from the regulator when the delayed processed input signal is received at the class G amplifier, and output a signal to the regulator to indicate the required configuration for the required supply voltage.Type: GrantFiled: December 29, 2017Date of Patent: September 24, 2019Assignee: AVNERA CORPORATIONInventors: Garry N. Link, Eric King, Xudong Zhao, Wai Lee, Alexander C. Stange, Amit Kumar
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Patent number: 10403279Abstract: A system for detecting and capturing voice commands, the system comprising a voice-activity detector (VAD) configured to receive a VAD-received digital-audio signal; determine the amplitude of the VAD-received digital-audio signal; compare the amplitude of the VAD-received digital-audio signal to a first threshold and to a second threshold; withhold a VAD interrupt signal when the amplitude of the VAD-received digital-audio signal does not exceed the first threshold or the second threshold; generate the VAD interrupt signal when the amplitude of the VAD-received digital-audio signal exceeds the first threshold and the second threshold; and perform spectral analysis of the VAD-received digital-audio signal when the amplitude of the VAD-received digital-audio signal is between the first threshold and the second threshold.Type: GrantFiled: September 15, 2017Date of Patent: September 3, 2019Assignee: Avnera CorporationInventors: Xudong Zhao, Alexander C. Stange, Shawn O'Connor, Ali Hadiashar
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Publication number: 20190207575Abstract: A Class G amplifier system including a processing unit configured to receive an input signal and output a delayed processed input signal, a class G amplifier configured to receive the delayed processed input signal, and a power supply. The power supply includes a regulator configured to operate in a plurality of configurations, each configuration outputs a different supply voltage to the class G amplifier and a control circuit configured to receive the input signal and determine the supply voltage required from the regulator when the delayed processed input signal is received at the class G amplifier, and output a signal to the regulator to indicate the required configuration for the required supply voltage.Type: ApplicationFiled: March 7, 2019Publication date: July 4, 2019Inventors: Garry N. Link, Eric King, Xudong Zhao, Wai Lee, Alexander C. Stange, Amit Kumar
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Publication number: 20190140816Abstract: A system can include a digital oversampler configured to oversample an input data stream; a rate generator configured to select a frequency that is not less than an expected frequency of the input data stream; a rate generator clock of the rate generator configured to output a clock signal that has the selected frequency; a sample receiver configured to receive at least one sample of the input data stream from the digital oversampler; a sample counter configured to be incremented by each received sample responsive to a determination that the sample receiver has received at least one sample of the input data stream from the digital oversampler; a sample rate converter configured to accumulate samples from the sample receiver at the rate of a “toothless” clock signal, wherein the sample counter is configured to be decremented by the “toothless” clock signal at the selected frequency responsive to a determination that the sample receiver has not received at least one sample of the input data stream from the digiType: ApplicationFiled: July 30, 2018Publication date: May 9, 2019Inventors: Samuel J. Peters, II, Eric P. Etheridge, Victor Lee Hansen, Alexander C. Stange
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Patent number: 10230343Abstract: A Class G amplifier system including a processing unit configured to receive an input signal and output a delayed processed input signal, a class G amplifier configured to receive the delayed processed input signal, and a power supply. The power supply includes a regulator configured to operate in a plurality of configurations, each configuration outputs a different supply voltage to the class G amplifier and a control circuit configured to receive the input signal and determine the supply voltage required from the regulator when the delayed processed input signal is received at the class G amplifier, and output a signal to the regulator to indicate the required configuration for the required supply voltage.Type: GrantFiled: December 29, 2017Date of Patent: March 12, 2019Assignee: AVNERA CORPORATIONInventors: Garry N. Link, Eric King, Xudong Zhao, Wai Lee, Alexander C. Stange, Amit Kumar
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Patent number: 10038548Abstract: A system can include a digital oversampler configured to oversample an input data stream; a rate generator configured to select a frequency that is not less than an expected frequency of the input data stream; a rate generator clock of the rate generator configured to output a clock signal that has the selected frequency; a sample receiver configured to receive at least one sample of the input data stream from the digital oversampler; a sample counter configured to be incremented by each received sample responsive to a determination that the sample receiver has received at least one sample of the input data stream from the digital oversampler; a sample rate converter configured to accumulate samples from the sample receiver at the rate of a “toothless” clock signal, wherein the sample counter is configured to be decremented by the “toothless” clock signal at the selected frequency responsive to a determination that the sample receiver has not received at least one sample of the input data stream from the digiType: GrantFiled: October 31, 2017Date of Patent: July 31, 2018Assignee: AVNERA CORPORATIONInventors: Samuel J. Peters, II, Eric P. Etheridge, Victor Lee Hansen, Alexander C. Stange
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Publication number: 20180198430Abstract: A Class G amplifier system including a processing unit configured to receive an input signal and output a delayed processed input signal, a class G amplifier configured to receive the delayed processed input signal, and a power supply. The power supply includes a regulator configured to operate in a plurality of configurations, each configuration outputs a different supply voltage to the class G amplifier and a control circuit configured to receive the input signal and determine the supply voltage required from the regulator when the delayed processed input signal is received at the class G amplifier, and output a signal to the regulator to indicate the required configuration for the required supply voltage.Type: ApplicationFiled: December 29, 2017Publication date: July 12, 2018Inventors: Garry N. Link, Eric King, Xudong Zhao, Wai Lee, Alexander C. Stange, Amit Kumar
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Publication number: 20180174583Abstract: A system for detecting and capturing voice commands, the system comprising a voice-activity detector (VAD) configured to receive a VAD-received digital-audio signal; determine the amplitude of the VAD-received digital-audio signal; compare the amplitude of the VAD-received digital-audio signal to a first threshold and to a second threshold; withhold a VAD interrupt signal when the amplitude of the VAD-received digital-audio signal does not exceed the first threshold or the second threshold; generate the VAD interrupt signal when the amplitude of the VAD-received digital-audio signal exceeds the first threshold and the second threshold; and perform spectral analysis of the VAD-received digital-audio signal when the amplitude of the VAD-received digital-audio signal is between the first threshold and the second threshold.Type: ApplicationFiled: September 15, 2017Publication date: June 21, 2018Inventors: Xudong Zhao, Alexander C. Stange, Shawn O'Connor, Ali Hadiashar
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Publication number: 20180054297Abstract: A system can include a digital oversampler configured to oversample an input data stream; a rate generator configured to select a frequency that is not less than an expected frequency of the input data stream; a rate generator clock of the rate generator configured to output a clock signal that has the selected frequency; a sample receiver configured to receive at least one sample of the input data stream from the digital oversampler; a sample counter configured to be incremented by each received sample responsive to a determination that the sample receiver has received at least one sample of the input data stream from the digital oversampler; a sample rate converter configured to accumulate samples from the sample receiver at the rate of a “toothless” clock signal, wherein the sample counter is configured to be decremented by the “toothless” clock signal at the selected frequency responsive to a determination that the sample receiver has not received at least one sample of the input data stream from the digiType: ApplicationFiled: October 31, 2017Publication date: February 22, 2018Inventors: Samuel J. Peters, II, Eric P. Etheridge, Victor Lee Hansen, Alexander C. Stange
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Patent number: 9832012Abstract: A method can include a digital oversampler oversampling an input data stream, a rate generator selecting a frequency that is not less than an expected frequency of the input data stream, a rate generator clock of the rate generator outputting a clock signal that has the selected frequency, determining whether a sample receiver has received at least one sample of the input data stream from the digital oversampler, and, responsive to a determination that the sample receiver has received at least one sample of the input data stream from the digital oversampler, incrementing a sample counter by each received sample. The method can also include a sample rate converter accumulating samples from the sample receiver at the rate of a “toothless” clock signal, determining whether an output of the sample counter is greater than zero, and, responsive to a determination that the output of the sample counter is greater than zero, an AND gate passing the “toothless” clock signal to the sample rate converter.Type: GrantFiled: April 11, 2017Date of Patent: November 28, 2017Assignee: AVNERA CORPORATIONInventors: Samuel J. Peters, II, Eric P. Etheridge, Victor Lee Hansen, Alexander C. Stange
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Publication number: 20170222793Abstract: A method can include a digital oversampler oversampling an input data stream, a rate generator selecting a frequency that is not less than an expected frequency of the input data stream, a rate generator clock of the rate generator outputting a clock signal that has the selected frequency, determining whether a sample receiver has received at least one sample of the input data stream from the digital oversampler, and, responsive to a determination that the sample receiver has received at least one sample of the input data stream from the digital oversampler, incrementing a sample counter by each received sample. The method can also include a sample rate converter accumulating samples from the sample receiver at the rate of a “toothless” clock signal, determining whether an output of the sample counter is greater than zero, and, responsive to a determination that the output of the sample counter is greater than zero, an AND gate passing the “toothless” clock signal to the sample rate converter.Type: ApplicationFiled: April 11, 2017Publication date: August 3, 2017Inventors: Samuel J. Peters, II, Eric P. Etheridge, Victor Lee Hansen, Alexander C. Stange
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Patent number: 9621336Abstract: A system and a technique for recovering data from an input data stream without synchronization of an input sampling circuit to the input data stream determines a count of incoming samples (or frames) without generating a signal that is frequency-locked to the input data stream. A first clock is generated comprising a frequency that is greater than or equal to an expected frequency of the input data stream. A sample count is incremented in response to a sample received in the input data stream, and is decremented in response to a second clock signal. The second clock is generated from the first clock signal by passing the first clock signal if the sample count of the sample counter does not equal a predetermined sample count value and by blocking the first clock signal if the sample count equals the predetermined sample count value.Type: GrantFiled: August 28, 2014Date of Patent: April 11, 2017Assignee: AVNERA CORPORATIONInventors: Samuel J. Peters, II, Eric P. Etheridge, Victor Lee Hansen, Alexander C. Stange
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Patent number: 8848849Abstract: A system and a technique for recovering data from an input data stream without synchronization of an input sampling circuit to the input data stream determines a count of incoming samples (or frames) without generating a signal that is frequency-locked to the input data stream. A first clock is generated comprising a frequency that is greater than or equal to an expected frequency of the input data stream. A sample count is incremented in response to a sample received in the input data stream, and is decremented in response to a second clock signal. The second clock is generated the first clock signal by passing the first clock signal if the sample count of the sample counter does not equal a predetermined sample count value and by blocking the first clock signal if the sample count equals the predetermined sample count value.Type: GrantFiled: March 13, 2013Date of Patent: September 30, 2014Assignee: Avnera CorporationInventors: Samuel J. Peters, Eric P. Etheridge, Victor Lee Hanson, Alexander C. Stange
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Publication number: 20140270028Abstract: A system and a technique for recovering data from an input data stream without synchronization of an input sampling circuit to the input data stream determines a count of incoming samples (or frames) without generating a signal that is frequency-locked to the input data stream. A first clock is generated comprising a frequency that is greater than or equal to an expected frequency of the input data stream. A sample count is incremented in response to a sample received in the input data stream, and is decremented in response to a second clock signal. The second clock is generated the first clock signal by passing the first clock signal if the sample count of the sample counter does not equal a predetermined sample count value and by blocking the first clock signal if the sample count equals the predetermined sample count value.Type: ApplicationFiled: March 13, 2013Publication date: September 18, 2014Applicant: Avnera CorporationInventors: Samuel J. Peters, II, Eric P. Etheridge, Victor Lee Hanson, Alexander C. Stange