Patents by Inventor Alexander Derrickson

Alexander Derrickson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260140303
    Abstract: Structures including a phase shifter and methods of forming such structures. The structure comprises a dielectric layer, a heater on the dielectric layer, a back-end-of-line stack on the dielectric layer and the heater, a substrate, and a second back-end-of-line stack on the substrate. The second back-end-of-line stack adjoins the first back-end-of-line stack along a bonding interface. The structure further comprises a waveguide core on the dielectric layer. The waveguide core includes a section that overlaps with the heater.
    Type: Application
    Filed: November 19, 2024
    Publication date: May 21, 2026
    Inventors: Oscar Restrepo, Riddhi Nandi, Anupam Dutta, Vibhor Jain, Alexander Derrickson, Rui Tze Toh, VVSS Satyasuresh Choppalli, Ravi Prakash Srivastava
  • Patent number: 12529843
    Abstract: Photonics chip structures including a reflector and methods of forming such structures. The photonics chip structure comprises a first waveguide core, a second waveguide core adjacent to the first waveguide core, and a reflector including a plurality of metal contacts over a portion of the first waveguide core. The second waveguide core is configured to couple light to the first waveguide core, and the metal contacts are configured to reflect the light.
    Type: Grant
    Filed: September 5, 2023
    Date of Patent: January 20, 2026
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Md Nabil Shehtab Dhrubo, Andreas D. Stricker, Alexander Derrickson, Subramanian Krishnamurthy, Yusheng Bian, Judson R. Holt
  • Patent number: 12532534
    Abstract: Structures that include field-effect transistors and methods of forming such structures. The structure comprises a substrate, a dielectric layer on the substrate, a first field-effect transistor including a first semiconductor layer over the dielectric layer and a first gate electrode, and a second field-effect transistor including a second semiconductor layer over the dielectric layer and a second gate electrode adjacent to the first gate electrode. The second semiconductor layer is connected to the first semiconductor layer, and the first and second semiconductor layers are positioned between the first gate electrode and the second gate electrode.
    Type: Grant
    Filed: December 13, 2022
    Date of Patent: January 20, 2026
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Venkatesh P. Gopinath, Navneet Jain, Hongru Ren, Alexander Derrickson, Jianwei Peng, Bipul C. Paul
  • Publication number: 20250359098
    Abstract: Structures for a heterojunction bipolar transistor and methods of forming a structure for a heterojunction bipolar transistor. The structure comprises an intrinsic base including a first semiconductor layer, a collector including a second semiconductor layer, and an emitter including a third semiconductor layer. The first semiconductor layer, which comprises silicon-germanium, includes a first portion and a second portion adjacent to the first portion. The second semiconductor layer includes a portion on the first portion of the first semiconductor layer, and the third semiconductor layer includes a portion on the second portion of the first semiconductor layer. The structure further comprises a dielectric spacer laterally between the portion of the second semiconductor layer and the portion of the third semiconductor layer.
    Type: Application
    Filed: December 16, 2024
    Publication date: November 20, 2025
    Inventors: Alexander Derrickson, Anupam Dutta, John Pekarik, Vibhor Jain, VVSS Satyasuresh Choppalli, Rui Tze Toh, Oscar Restrepo
  • Patent number: 12471294
    Abstract: Structures that include bipolar junction transistors and methods of forming such structures. The structure comprises a substrate having a top surface, a trench isolation region in the substrate, and a base layer on the top surface of the substrate. The base layer extending across the trench isolation region. A first bipolar junction transistor includes a first collector in the substrate and a first emitter on a first portion of the first base layer. The first portion of the first base layer is positioned between the first collector and the first emitter. A second bipolar junction transistor includes a second collector in the substrate and a second emitter on a second portion of the first base layer. The second portion of the first base layer is positioned between the second collector and the second emitter.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: November 11, 2025
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: John J. Pekarik, Hong Yu, Vibhor Jain, Alexander Derrickson, Venkatesh Gopinath
  • Patent number: 12464745
    Abstract: Structures that include bipolar junction transistors and methods of forming such structures. The structure comprises a semiconductor layer, a substrate, and a dielectric layer disposed between the semiconductor layer and the substrate. The structure further comprises a first bipolar junction transistor including a first collector in the substrate, a first emitter, and a first base layer. The first base layer extends through the dielectric layer from the first emitter to the first collector. The structure further comprises a second bipolar junction transistor including a second collector in the substrate, a second emitter, and a second base layer. The second base layer extends through the dielectric layer from the second emitter to the second collector. The second base layer is connected to the first base layer by a section of the semiconductor layer to define a base line.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: November 4, 2025
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Alexander Derrickson, Venkatesh Gopinath, John J. Pekarik, Hong Yu, Vibhor Jain, David Pritchard
  • Patent number: 12426278
    Abstract: Structures that include resistive memory elements and methods of forming a structure that includes resistive memory elements. The structure comprises a bipolar junction transistor including a base, a first terminal having a first raised semiconductor layer over the base, and a second terminal having a second raised semiconductor layer over the base. The first raised semiconductor layer is spaced in a lateral direction from the second raised semiconductor layer. The structure further comprises a resistive memory element including a first electrode, a second electrode, and a switching layer between the first electrode and the second electrode. The first electrode of the resistive memory element is coupled to the first terminal of the bipolar junction transistor.
    Type: Grant
    Filed: October 26, 2022
    Date of Patent: September 23, 2025
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Venkatesh P. Gopinath, Alexander Derrickson, Hongru Ren
  • Publication number: 20250227943
    Abstract: Structures for a heterojunction bipolar transistor and methods of forming a structure for a heterojunction bipolar transistor. The structure comprises a first semiconductor layer including a first portion, a second portion, and a third portion between the first portion and the second portion, a first terminal including a first semiconductor region on the first portion of the first semiconductor layer, a second terminal including a second semiconductor region on the second portion of the first semiconductor layer, an intrinsic base laterally disposed between the first terminal and the second terminal, and an extrinsic base on the intrinsic base. The intrinsic base includes a doped region in the third portion of the first semiconductor layer, and the doped region has a dopant depth profile with a dopant concentration that is asymmetrical relative to the first terminal and the second terminal.
    Type: Application
    Filed: January 10, 2024
    Publication date: July 10, 2025
    Inventors: Alexander Derrickson, Halid Mulaosmanovic, Peter Baars, Judson R. Holt, Zhixing Zhao
  • Patent number: 12349374
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. The structure includes: an extrinsic base having at least one sidewall with a gradient concentration of semiconductor material; an emitter on a first side of the extrinsic base; and a collector on a second side of the extrinsic base.
    Type: Grant
    Filed: May 10, 2024
    Date of Patent: July 1, 2025
    Assignee: GLOBALFOUNDRIES U.S. Inc.
    Inventors: Hong Yu, Judson R. Holt, Alexander Derrickson
  • Patent number: 12336243
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor with gated collector and methods of manufacture. The structure includes: an extrinsic base region vertically over a semiconductor substrate and comprising asymmetrical sidewall spacers on opposing sidewalls of the extrinsic base region; a collector region on the semiconductor substrate and separated from the extrinsic base region by at least a first spacer of the asymmetrical sidewall spacers; and an emitter region on the semiconductor substrate and separated from the extrinsic base region by a second spacer of the asymmetrical sidewall spacers.
    Type: Grant
    Filed: January 5, 2024
    Date of Patent: June 17, 2025
    Assignee: GLOBALFOUNDRIES U.S. Inc.
    Inventors: Alexander Derrickson, Vibhor Jain, Judson R. Holt, Jagar Singh, Mankyu Yang
  • Patent number: 12327776
    Abstract: A semiconductor device includes a first substrate, a second substrate bonded to the first substrate, and at least one thermally conductive structure that extends through a portion of the first substrate and a portion of the second substrate and is vertically aligned with an active region of the first substrate. The at least one thermally conductive structure is electrically insulated from electrically active structures in the semiconductor device. The thermally conductive structure acts as a heat sink to transfer heat from the active region.
    Type: Grant
    Filed: March 27, 2024
    Date of Patent: June 10, 2025
    Assignee: GlobalFoundries Singapore Pte. Ltd.
    Inventors: Rui Tze Toh, Anupam Dutta, Oscar D. Restrepo, Vibhor Jain, Vvss Satyasuresh Choppalli, John J. Pekarik, Alexander Derrickson
  • Publication number: 20250147235
    Abstract: Structures for a photonics chip that include a photodetector and methods of forming such structures. The structure comprises a photodetector that is disposed on a substrate and that includes a light-absorbing layer. The light-absorbing layer includes a sidewall and a notch in the sidewall. The structure further comprises a waveguide core including a section adjacent to the notch in the sidewall of the light-absorbing layer.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 8, 2025
    Inventors: Yusheng Bian, Andreas D. Stricker, Abdelsalam Aboketaf, Judson R. Holt, Kevin K. Dezfulian, Kenneth J. Giewont, Alexander Derrickson, Won Suk Lee, Sujith Chandran, Ryan W. Sporer, Teng-Yin Lin
  • Publication number: 20250076574
    Abstract: Photonics chip structures including a reflector and methods of forming such structures. The photonics chip structure comprises a first waveguide core, a second waveguide core adjacent to the first waveguide core, and a reflector including a plurality of metal contacts over a portion of the first waveguide core. The second waveguide core is configured to couple light to the first waveguide core, and the metal contacts are configured to reflect the light.
    Type: Application
    Filed: September 5, 2023
    Publication date: March 6, 2025
    Inventors: Md Nabil Shehtab Dhrubo, Andreas D. Stricker, Alexander Derrickson, Subramanian Krishnamurthy, Yusheng Bian, Judson R. Holt
  • Patent number: 12211929
    Abstract: Structures for a heterojunction bipolar transistor and methods of forming a structure for a heterojunction bipolar transistor. The structure comprises an intrinsic base including a first semiconductor layer, a collector including a second semiconductor layer, and an emitter including a third semiconductor layer. The first semiconductor layer, which comprises silicon-germanium, includes a first portion and a second portion adjacent to the first portion. The second semiconductor layer includes a portion on the first portion of the first semiconductor layer, and the third semiconductor layer includes a portion on the second portion of the first semiconductor layer. The structure further comprises a dielectric spacer laterally between the portion of the second semiconductor layer and the portion of the third semiconductor layer.
    Type: Grant
    Filed: May 14, 2024
    Date of Patent: January 28, 2025
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Alexander Derrickson, Anupam Dutta, John Pekarik, Vibhor Jain, V V S S Satyasuresh Choppalli, Rui Tze Toh, Oscar Restrepo
  • Patent number: 12159926
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. A structure includes: an intrinsic base comprising semiconductor material in a channel region of a semiconductor substrate; an extrinsic base vertically above the intrinsic base; a raised collector region on the semiconductor substrate and laterally connected to the intrinsic base; and a raised emitter region on the semiconductor substate and laterally connected to the intrinsic base.
    Type: Grant
    Filed: September 27, 2023
    Date of Patent: December 3, 2024
    Assignee: GLOBALFOUNDRIES U.S. Inc.
    Inventors: Haiting Wang, Alexander Derrickson, Jagar Singh, Vibhor Jain, Andreas Knorr, Alexander Martin, Judson R. Holt, Zhenyu Hu
  • Publication number: 20240297242
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. The structure includes: an extrinsic base having at least one sidewall with a gradient concentration of semiconductor material; an emitter on a first side of the extrinsic base; and a collector on a second side of the extrinsic base.
    Type: Application
    Filed: May 10, 2024
    Publication date: September 5, 2024
    Inventors: Hong Yu, Judson R. Holt, Alexander Derrickson
  • Patent number: 12040388
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. The structure includes: an extrinsic base having at least one sidewall with a gradient concentration of semiconductor material; an emitter on a first side of the extrinsic base; and a collector on a second side of the extrinsic base.
    Type: Grant
    Filed: November 12, 2021
    Date of Patent: July 16, 2024
    Assignee: GLOBALFOUNDRIES U.S. Inc.
    Inventors: Hong Yu, Judson R. Holt, Alexander Derrickson
  • Publication number: 20240194535
    Abstract: Structures that include field-effect transistors and methods of forming such structures. The structure comprises a substrate, a dielectric layer on the substrate, a first field-effect transistor including a first semiconductor layer over the dielectric layer and a first gate electrode, and a second field-effect transistor including a second semiconductor layer over the dielectric layer and a second gate electrode adjacent to the first gate electrode. The second semiconductor layer is connected to the first semiconductor layer, and the first and second semiconductor layers are positioned between the first gate electrode and the second gate electrode.
    Type: Application
    Filed: December 13, 2022
    Publication date: June 13, 2024
    Inventors: Venkatesh P. Gopinath, Navneet Jain, Hongru Ren, Alexander Derrickson, Jianwei Peng, Bipul C. Paul
  • Publication number: 20240172455
    Abstract: Structures that include bipolar junction transistors and methods of forming such structures. The structure comprises a substrate having a top surface, a trench isolation region in the substrate, and a base layer on the top surface of the substrate. The base layer extending across the trench isolation region. A first bipolar junction transistor includes a first collector in the substrate and a first emitter on a first portion of the first base layer. The first portion of the first base layer is positioned between the first collector and the first emitter. A second bipolar junction transistor includes a second collector in the substrate and a second emitter on a second portion of the first base layer. The second portion of the first base layer is positioned between the second collector and the second emitter.
    Type: Application
    Filed: November 21, 2022
    Publication date: May 23, 2024
    Inventors: John J. Pekarik, Hong Yu, Vibhor Jain, Alexander Derrickson, Venkatesh Gopinath
  • Publication number: 20240170560
    Abstract: Structures that include bipolar junction transistors and methods of forming such structures. The structure comprises a semiconductor layer, a substrate, and a dielectric layer disposed between the semiconductor layer and the substrate. The structure further comprises a first bipolar junction transistor including a first collector in the substrate, a first emitter, and a first base layer. The first base layer extends through the dielectric layer from the first emitter to the first collector. The structure further comprises a second bipolar junction transistor including a second collector in the substrate, a second emitter, and a second base layer. The second base layer extends through the dielectric layer from the second emitter to the second collector. The second base layer is connected to the first base layer by a section of the semiconductor layer to define a base line.
    Type: Application
    Filed: November 21, 2022
    Publication date: May 23, 2024
    Inventors: Alexander Derrickson, Venkatesh Gopinath, John J. Pekarik, Hong Yu, Vibhor Jain, David Pritchard