Patents by Inventor Alexander Faingersh

Alexander Faingersh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11962919
    Abstract: For example, analog pixel circuitry may include a first input to input an analog pixel signal of the pixel; Sample and Hold (SH) circuitry to provide an analog sample of the pixel based on the analog pixel signal; one or more second inputs to input analog samples of one or more binning pixels, respectively; a plurality of capacitors having capacitor outputs connected to a common output terminal, wherein a capacitor input of a first capacitor is connected to an input terminal to input the analog sample of the pixel from the SH circuitry, wherein capacitor inputs of one or more second capacitors are connected to the one or more second inputs, respectively; and an amplifier configured to provide an amplified analog signal by amplifying an analog signal from the common output terminal.
    Type: Grant
    Filed: July 24, 2022
    Date of Patent: April 16, 2024
    Assignee: TOWER SEMICONDUCTOR LTD.
    Inventors: Alexander Faingersh, Vered Antebi, Raz Reshef
  • Publication number: 20240031693
    Abstract: For example, analog pixel circuitry may include a first input to input an analog pixel signal of the pixel; Sample and Hold (SH) circuitry to provide an analog sample of the pixel based on the analog pixel signal; one or more second inputs to input analog samples of one or more binning pixels, respectively; a plurality of capacitors having capacitor outputs connected to a common output terminal, wherein a capacitor input of a first capacitor is connected to an input terminal to input the analog sample of the pixel from the SH circuitry, wherein capacitor inputs of one or more second capacitors are connected to the one or more second inputs, respectively; and an amplifier configured to provide an amplified analog signal by amplifying an analog signal from the common output terminal.
    Type: Application
    Filed: July 24, 2022
    Publication date: January 25, 2024
    Applicant: TOWER SEMICONDUCTOR LTD.
    Inventors: Alexander Faingersh, Vered Antebi, Raz Reshef
  • Patent number: 10630070
    Abstract: A device for overcurrent protection, the device may include a main transistor that is configured to supply, via an output node, a load current to a load; a current limiting resistor; a replica transistor that is configured to provide a replica current to the current limiting resistor; wherein the replica current is smaller than the load current, wherein a value of the replica current is responsive to a value of the load current; an amplifier; a current limiting transistor; a variable signal source that is configured to output a reference signal; wherein a value of the reference signal is based on a main transistor voltage; wherein the amplifier is configured to prevent the load current from exceeding a first load current threshold by biasing the main transistor and the replica transistor with a bias signal; wherein a value of the bias signal is responsive to the reference signal and to the replica current.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: April 21, 2020
    Inventors: Alexander Faingersh, Valentin Lerner, Erez Sarig, Raz Reshef
  • Publication number: 20180301896
    Abstract: A device for overcurrent protection, the device may include a main transistor that is configured to supply, via an output node, a load current to a load; a current limiting resistor; a replica transistor that is configured to provide a replica current to the current limiting resistor; wherein the replica current is smaller than the load current, wherein a value of the replica current is responsive to a value of the load current; an amplifier; a current limiting transistor; a variable signal source that is configured to output a reference signal; wherein a value of the reference signal is based on a main transistor voltage; wherein the amplifier is configured to prevent the load current from exceeding a first load current threshold by biasing the main transistor and the replica transistor with a bias signal; wherein a value of the bias signal is responsive to the reference signal and to the replica current.
    Type: Application
    Filed: April 18, 2017
    Publication date: October 18, 2018
    Applicant: Tower Semiconductor LTD.
    Inventors: Alexander Faingersh, Valentin Lerner, Erez Sarig, Raz Reshef
  • Patent number: 9484800
    Abstract: A soft-start circuit for a switching regulator (e.g., a buck converter) in which the soft-start circuit supplies a DC ramp voltage to the switch regulator's pre-driver such that the pulsed gate voltage supplied to power switch during the initial soft-start operating phase includes a series of pulses having amplitudes that respectively gradually change (e.g., sequentially increase from 0V to the system operating voltage), whereby the regulated output voltage passed from the power switch to the load is gradually increased at a rate that prevents voltage overshoot and inrush current. The DC ramp voltage is generated, for example, by a current source that begins charging a capacitor at the beginning of the initial soft-start operating phase. This arrangement allows a constant-frequency ramp signal generated by a single oscillator to be shared by multiple switch regulators that are fabricated on an IC chip.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: November 1, 2016
    Assignee: Tower Semiconductor Ltd.
    Inventors: Alexander Faingersh, Erez Sarig
  • Publication number: 20150256060
    Abstract: A soft-start circuit for a switching regulator (e.g., a buck converter) in which the soft-start circuit supplies a DC ramp voltage to the switch regulator's pre-driver such that the pulsed gate voltage supplied to power switch during the initial soft-start operating phase includes a series of pulses having amplitudes that respectively gradually change (e.g., sequentially increase from 0V to the system operating voltage), whereby the regulated output voltage passed from the power switch to the load is gradually increased at a rate that prevents voltage overshoot and inrush current. The DC ramp voltage is generated, for example, by a current source that begins charging a capacitor at the beginning of the initial soft-start operating phase. This arrangement allows a constant-frequency ramp signal generated by a single oscillator to be shared by multiple switch regulators that are fabricated on an IC chip.
    Type: Application
    Filed: March 5, 2014
    Publication date: September 10, 2015
    Applicant: Tower Semiconductor Ltd.
    Inventors: Alexander Faingersh, Erez Sarig