Patents by Inventor Alexander Friz
Alexander Friz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11882770Abstract: Embodiments are provided for fabrication of superconducting devices using area-selective deposition of a metal nitride. In some embodiments, a method can include providing a thermally treated carbon layer, and selectively depositing a metal nitride using the thermally treated carbon layer for formation of a superconducting device.Type: GrantFiled: December 10, 2020Date of Patent: January 23, 2024Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Rudy J. Wojtecki, Damon Brooks Farmer, Charles Thomas Rettner, Noel Arellano, Alexander Friz, Matthew W. Copel
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Publication number: 20220190229Abstract: Embodiments are provided for fabrication of superconducting devices using area-selective deposition of a metal nitride. In some embodiments, a method can include providing a thermally treated carbon layer, and selectively depositing a metal nitride using the thermally treated carbon layer for formation of a superconducting device.Type: ApplicationFiled: December 10, 2020Publication date: June 16, 2022Inventors: Rudy J. Wojtecki, Damon Brooks Farmer, Charles Thomas Rettner, Noel Arellano, Alexander Friz, Matthew W. Copel
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Patent number: 8802347Abstract: Coating compositions include a polymer including: wherein R1 is a silicon containing moiety, R2 is an acid stable lactone functionality, and R3 is an acid labile lactone functionality; X1, X2, X3 are independently H or CH3; and m and o are non-zero positive integers and n is zero or a positive integer representing the number of repeat units; a photoacid generator; and a solvent. Also disclosed are methods for forming a pattern in the coating composition containing the same.Type: GrantFiled: November 6, 2009Date of Patent: August 12, 2014Assignee: International Business Machines CorporationInventors: Robert D. Allen, Phillip J. Brock, Kuang-Jung Chen, Alexander Friz, Wu-Song Huang, Ratnam Sooriyakumaran, Sally A. Swanson, Hoa D. Truong
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Publication number: 20110111345Abstract: Coating compositions include a polymer including: wherein R1 is a silicon containing moiety, R2 is an acid stable lactone functionality, and R3 is an acid labile lactone functionality; X1, X2, X3 are independently H or CH3; and m and o are non-zero positive integers and n is zero or a positive integer representing the number of repeat units; a photoacid generator; and a solvent. Also disclosed are methods for forming a pattern in the coating composition containing the same.Type: ApplicationFiled: November 6, 2009Publication date: May 12, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Robert D. Allen, Phillip J. Brock, Kuang-Jung Chen, Alexander Friz, Wu-Song Huang, Ratnam Sooriyakumaran, Sally A. Swanson, Hoa D. Truong
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Patent number: 7531040Abstract: A method is disclosed for one embodiment. An amount of photoresist is deposited upon a substrate, the amount of photoresist more than necessary to coat the substrate. The substrate is spun within a bowl such that an excess amount of photoresist is propelled off of the substrate to an interior surface of the bowl. A portion of the excess amount of photoresist is recovered and treated such that the recovered portion of the excess amount of photoresist is rendered usable.Type: GrantFiled: October 2, 2003Date of Patent: May 12, 2009Assignee: ASML Holdings N.V.Inventors: Joseph Consolini, Keith Best, Cheng Gui, Alexander Friz
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Patent number: 7501215Abstract: The present invention relates to a device manufacturing method wherein a plurality of front side marks are manufactured on the front side of the substrate. These marks are used to locally align the substrate when exposing. After certain processing steps, the positions of the front side marks are measured and compared with respect to their original positions. The measured position changes of the front side marks, i.e. their behaviour, can then be analyzed. The original positions and actual positions are defined with respect to a nominal grid which is defined using global alignment marks which are positioned at the back side of the substrate. Because the global alignment marks are positioned at the back side, they are not affected by any processing step.Type: GrantFiled: June 28, 2005Date of Patent: March 10, 2009Assignee: ASML Netherlands B.V.Inventors: Keith Frank Best, Joseph J. Consolini, Alexander Friz
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Patent number: 7410880Abstract: In a method for measuring the bonding quality of bonded substrates, such as bonded SOI wafers, a plurality of marks are created at a first side of a top substrate after, or before, the bonding of the top substrate onto a bottom substrate. Then, the positions of the plurality of marks are measured using a metrology tool. Next, for each of the marks, a difference between a measured position and an expected position is calculated. These differences can be used to determine delamination between the top substrate and the bottom substrate. By displaying a vector field representing the differences, and by not showing vectors that exceed a certain threshold, the delamination areas can be made visible.Type: GrantFiled: December 27, 2004Date of Patent: August 12, 2008Assignee: ASML Netherlands B.V.Inventors: Keith Frank Best, Joseph J. Consolini, Alexander Friz
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Patent number: 7320847Abstract: A device manufacturing method capable of imaging structures on one side of a substrate aligned to markers on the other side, is presented herein. One embodiment of the present invention comprises providing a first substrate having first and second surfaces, patterning the first surface of the substrate with at least one reversed alignment marker, providing a protective layer over the alignment marker, and bonding the first surface of the first substrate to a second substrate. The embodiment further includes locally etching the first substrate as far as the protective layer to form a trench around the reversed alignment marker, and forming at least one patterned layer on the second surface using a lithographic projection apparatus having a front-to-backside alignment system while aligning the substrate to the alignment markers revealed in each trench.Type: GrantFiled: November 12, 2003Date of Patent: January 22, 2008Assignee: ASML Netherlands B.V.Inventors: Keith Frank Best, Joseph J. Consolini, Alexander Friz
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Publication number: 20070196746Abstract: Embodiments of the invention provide methods and apparatuses for efficient and cost-effective imaging of alignment marks. For one embodiment, alignment mark imaging is accomplished separately from, and independent of product imaging through use of a relatively low cost, low resolution, imaging tool. For one embodiment a wafer is exposed to low-resolution light source through a reticle having a number of alignment patterns corresponding to desired alignment marks. For one embodiment, global alignment marks are imaged on a backside of a wafer. Various embodiments of the invention obviate the need for a highly accurate stage and a high-resolution imaging device, and therefore reduce processing costs and processing time.Type: ApplicationFiled: April 11, 2007Publication date: August 23, 2007Inventors: Joseph Consolini, Keith Best, Cheng Gui, Alexander Friz
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Patent number: 7256865Abstract: Embodiments of the invention provide methods and apparatuses for efficient and cost-effective imaging of alignment marks. For one embodiment, alignment mark imaging is accomplished separately from, and independent of product imaging through use of a relatively low cost, low resolution, imaging tool. For one embodiment a wafer is exposed to low-resolution light source through a reticle having a number of alignment patterns corresponding to desired alignment marks. For one embodiment, global alignment marks are imaged on a backside of a wafer. Various embodiments of the invention obviate the need for a highly accurate stage and a high-resolution imaging device, and therefore reduce processing costs and processing time.Type: GrantFiled: October 24, 2003Date of Patent: August 14, 2007Assignee: ASML Holding N.V.Inventors: Joseph Consolini, Keith Best, Cheng Gui, Alexander Friz
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Publication number: 20060292463Abstract: The present invention relates to a device manufacturing method wherein a plurality of front side marks are manufactured on the front side of the substrate. These marks are used to locally align the substrate when exposing. After certain processing steps, the positions of the front side marks are measured and compared with respect to their original positions. The measured position changes of the front side marks, i.e. their behaviour, can then be analyzed. The original positions and actual positions are defined with respect to a nominal grid which is defined using global alignment marks which are positioned at the back side of the substrate. Because the global alignment marks are positioned at the back side, they are not affected by any processing step.Type: ApplicationFiled: June 28, 2005Publication date: December 28, 2006Applicant: ASML Netherlands B.V.Inventors: Keith Best, Joseph Consolini, Alexander Friz
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Patent number: 7130049Abstract: In a method of measurement according to one embodiment of the invention, a relative position of a temporary alignment mark on one side of a substrate and an alignment mark on the other side of the substrate is determined, and the temporary alignment mark is removed. Before removal of the temporary alignment mark, a relative position of that mark and another mark on the same side of the substrate may be determined. The temporary alignment mark may be formed in, e.g., an oxide layer.Type: GrantFiled: December 24, 2003Date of Patent: October 31, 2006Assignee: ASML Netherlands B.V.Inventors: Joseph J. Consolini, Keith Frank Best, Alexander Friz
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Publication number: 20060141738Abstract: In a method for measuring the bonding quality of bonded substrates, such as bonded SOI wafers, a plurality of marks are created at a first side of a top substrate after, or before, the bonding of the top substrate onto a bottom substrate. Then, the positions of the plurality of marks are measured using a metrology tool. Next, for each of the marks, a difference between a measured position and an expected position is calculated. These differences can be used to determine delamination between the top substrate and the bottom substrate. By displaying a vector field representing the differences, and by not showing vectors that exceed a certain threshold, the delamination areas can be made visible.Type: ApplicationFiled: December 27, 2004Publication date: June 29, 2006Applicant: ASML NETHERLANDS B.V.Inventors: Keith Best, Joseph Consolini, Alexander Friz
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Publication number: 20060138681Abstract: Provided are substrates, e.g. semiconductor wafers, whereby the front side of the substrate and the back side of the substrate differ in surface roughness. Also provided are lithography processes using the substrates.Type: ApplicationFiled: February 11, 2005Publication date: June 29, 2006Applicant: ASML NETHERLANDS B.V.Inventors: Keith Best, Joseph Consolini, Alexander Friz, Rodney Chisholm
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Patent number: 7041996Abstract: While the alignment beam is focused on a mark on the substrate table, the substrate table is moved substantially perpendicularly to the alignment beam. If the image of the mark moves relative to a reference mark, then the substrate and the alignment beam are not perpendicular. The mark on the substrate table is aligned to a plurality of reference marks. At least two substrate marks are then aligned with a single reference mark. Errors due to the inclination of the alignment beam are eliminated from the expansion and rotation values calculated for the substrate.Type: GrantFiled: September 11, 2003Date of Patent: May 9, 2006Assignee: ASML Netherlands B.V.Inventors: Keith Frank Best, Joseph Consolini, Alexander Friz, Henricus Wilhelmus Maria Van Buel
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Patent number: 7019814Abstract: A method according to one embodiment of the invention may be used in determining relative positions of developed patterns on a substrate (exposed e.g. using the step mode). Such a method uses reference marks which are located within or even superimposed on device patterns. Also disclosed is a mask of a lithographic projection apparatus including reference marks that may be used in such a method.Type: GrantFiled: December 19, 2003Date of Patent: March 28, 2006Assignee: ASML Netherlands B.V.Inventors: Keith Frank Best, Joseph J. Consolini, Alexander Friz
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Publication number: 20060035159Abstract: In a method according to one embodiment, a first and second set of alignment marks are etched into a first side of the substrate. The first set of alignment marks are at location(s) such that they will appear in the object windows of front-to-backside alignment optics of a first lithographic apparatus, and the location(s) of the second set of alignment marks are selected according to an arrangement of alignment apparatus in another lithographic apparatus. The substrate is turned over, aligned using the first set of alignment marks and front-to-backside alignment optics and third and fourth set of alignment marks are etched into the substrate, directly opposite the second and first sets of alignment marks, respectively.Type: ApplicationFiled: August 10, 2004Publication date: February 16, 2006Applicant: ASML NETHERLANDS B.V.Inventors: Keith Best, Joseph Consolini, Alexander Friz
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Publication number: 20050146721Abstract: In a method of measurement according to one embodiment of the invention, a relative position of a temporary alignment mark on one side of a substrate and an alignment mark on the other side of the substrate is determined, and the temporary alignment mark is removed. Before removal of the temporary alignment mark, a relative position of that mark and another mark on the same side of the substrate may be determined. The temporary alignment mark may be formed in, e.g., an oxide layer.Type: ApplicationFiled: December 24, 2003Publication date: July 7, 2005Applicant: ASML NETHERLANDS B.V.Inventors: Joseph Consolini, Keith Best, Alexander Friz
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Patent number: 6914664Abstract: To align between layers having a large Z separation, an alignment system which illuminates reference markers with normally incident radiation is used. The alignment system has an illumination system that is telecentric on the substrate side.Type: GrantFiled: February 13, 2003Date of Patent: July 5, 2005Assignee: ASML Netherlands B.V.Inventors: Keith Frank Best, Alexander Friz, Joseph J. Consolini, Henricus Wilhelmus Maria Van Buel, Cheng-Qun Gui
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Publication number: 20050089762Abstract: Embodiments of the invention provide methods and apparatuses for efficient and cost-effective imaging of alignment marks. For one embodiment, alignment mark imaging is accomplished separately from, and independent of product imaging through use of a relatively low cost, low resolution, imaging tool. For one embodiment a wafer is exposed to low-resolution light source through a reticle having a number of alignment patterns corresponding to desired alignment marks. For one embodiment, global alignment marks are imaged on a backside of a wafer. Various embodiments of the invention obviate the need for a highly accurate stage and a high-resolution imaging device, and therefore reduce processing costs and processing time.Type: ApplicationFiled: October 24, 2003Publication date: April 28, 2005Inventors: Joseph Consolini, Keith Best, Cheng Gui, Alexander Friz