Patents by Inventor Alexander J. Kovacs

Alexander J. Kovacs has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Hybrid computing module
    Patent number: 10620680
    Abstract: A hybrid system-on-chip provides a plurality of memory and processor die mounted on a semiconductor carrier chip that contains a fully integrated power management system that switches DC power at speeds that match or approach processor core clock speeds, thereby supporting the transfer of data between off-chip physical memory and processor die.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: April 14, 2020
    Inventors: L. Pierre de Rochemont, Alexander J. Kovacs
  • Hybrid computing module
    Patent number: 9710181
    Abstract: A hybrid system-on-chip provides a plurality of memory and processor die mounted on a semiconductor carrier chip that contains a fully integrated power management system that switches DC power at speeds that match or approach processor core clock speeds, thereby allowing the transfer of data between off-chip physical memory and processor die.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: July 18, 2017
    Inventors: L. Pierre de Rochemont, Alexander J. Kovacs
  • HYBRID COMPUTING MODULE
    Publication number: 20170139624
    Abstract: A hybrid system-on-chip provides a plurality of memory and processor die mounted on a semiconductor carrier chip that contains a fully integrated power management system that switches DC power at speeds that match or approach processor core clock speeds, thereby allowing the efficient transfer of data between off-chip physical memory and processor die.
    Type: Application
    Filed: May 23, 2016
    Publication date: May 18, 2017
    Inventors: L. Pierre de Rochemont, Alexander J. Kovacs
  • HYBRID COMPUTING MODULE
    Publication number: 20170031843
    Abstract: A hybrid system-on-chip provides a plurality of memory and processor die mounted on a semiconductor carrier chip that contains a fully integrated power management system that switches DC power at speeds that match or approach processor core clock speeds, thereby allowing the efficient transfer of data between off-chip physical memory and processor die.
    Type: Application
    Filed: May 24, 2016
    Publication date: February 2, 2017
    Inventors: L. Pierre de Rochemont, Alexander J. Kovacs
  • HYBRID COMPUTING MODULE
    Publication number: 20170031847
    Abstract: A hybrid system-on-chip provides a plurality of memory and processor die mounted on a semiconductor carrier chip that contains a hilly integrated power management system that switches DC power at speeds that match or approach processor core clock speeds, thereby allowing the efficient transfer of data between off-chip physical memory and processor die.
    Type: Application
    Filed: May 24, 2016
    Publication date: February 2, 2017
    Inventors: L. Pierre de Rochemont, Alexander J. Kovacs
  • HYBRID COMPUTING MODULE
    Publication number: 20170031413
    Abstract: A hybrid system-on-chip provides a plurality of memory and processor die mounted on a semiconductor carrier chip that contains a fully integrated power management system that switches DC power at speeds that match or approach processor core dock speeds, thereby allowing the efficient transfer of data between off-chip physical memory and processor die.
    Type: Application
    Filed: May 23, 2016
    Publication date: February 2, 2017
    Inventors: L. Pierre de Rochemont, Alexander J. Kovacs
  • HYBRID COMPUTING MODULE
    Publication number: 20170031844
    Abstract: A hybrid system-on-chip provides a plurality of memory and processor die mounted on a semiconductor carrier chip that contains a fay integrated power management system that switches DC power at speeds that match or approach processor core clock speeds, thereby allowing the efficient transfer of data between off-chip physical memory and processor die.
    Type: Application
    Filed: May 24, 2016
    Publication date: February 2, 2017
    Inventors: L. Pierre de Rochemont, Alexander J. Kovacs
  • Hybrid computing module
    Patent number: 9348385
    Abstract: A hybrid system-on-chip provides a plurality of memory and processor die mounted on a semiconductor carrier chip that contains a fully integrated power management system that switches DC power at speeds that match or approach processor core clock speeds, to enable transfer of data between off-chip physical memory and processor die.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: May 24, 2016
    Inventors: L. Pierre de Rochemont, Alexander J. Kovacs
  • HYBRID COMPUTING MODULE
    Publication number: 20140013129
    Abstract: A hybrid system-on-chip provides a plurality of memory and processor die mounted on a semiconductor carrier chip that contains a fully integrated power management system that switches DC power at speeds that match or approach processor core clock speeds, thereby allowing the efficient transfer of data between off-chip physical memory and processor die
    Type: Application
    Filed: June 13, 2013
    Publication date: January 9, 2014
    Inventors: L. Pierre de Rochemont, Alexander J. Kovacs
  • HYBRID COMPUTING MODULE
    Publication number: 20140013132
    Abstract: A hybrid system-on-chip provides a plurality of memory and processor die mounted on a semiconductor carrier chip that contains a fully integrated power management system that switches DC power at speeds that match or approach processor core clock speeds, thereby allowing the efficient transfer of data between off-chip physical memory and processor die.
    Type: Application
    Filed: June 13, 2013
    Publication date: January 9, 2014
    Inventors: L. Pierre de Rochemont, Alexander J. Kovacs
  • Liquid chemical deposition apparatus and process and products therefrom
    Patent number: 8354294
    Abstract: A method, apparatus and material produced thereby in an amorphous or crystalline form having multiple elements with a uniform molecular distribution of elements at the molecular level.
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: January 15, 2013
    Inventors: L. Pierre de Rochemont, Alexander J. Kovacs
  • LIQUID CHEMICAL DEPOSTION APPARATUS AND PROCESS AND PRODUCTS THEREFROM
    Publication number: 20110021007
    Abstract: A method, apparatus and material produced thereby in an amorphous or crystalline form having multiple elements with a uniform molecular distribution of elements at the molecular level.
    Type: Application
    Filed: July 26, 2010
    Publication date: January 27, 2011
    Inventors: L. Pierre de Rochemont, Alexander J. Kovacs