Patents by Inventor Alexander Kirichenko
Alexander Kirichenko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230337553Abstract: Materials and methods are disclosed for fabricating superconducting integrated circuits for quantum computing at millikelvin temperatures, comprising both quantum circuits and classical control circuits, which may be located on the same integrated circuit or on different chips of a multi-chip module. The materials may include components that reduce defect densities and increase quantum coherence times. Multilayer fabrication techniques provide low-power and a path to large scale computing systems. An integrated circuit system for quantum computing is provided, comprising: a substrate; a kinetic inductance layer having a kinetic inductance of at least 5 pH/square; a plurality of stacked planarized superconducting layers and intervening insulating layers, formed into a plurality of Josephson junctions having a critical current of less than 100 ?A/?m2; and a resistive layer that remains non-superconducting at a temperature below 1 K, configured to damp the plurality of Josephson junctions.Type: ApplicationFiled: November 21, 2022Publication date: October 19, 2023Inventors: Daniel Yohannes, Mario Renzullo, John Vivalda, Alexander Kirichenko
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Publication number: 20220393089Abstract: Materials and methods are disclosed for fabricating superconducting integrated circuits for quantum computing at millikelvin temperatures, comprising both quantum circuits and classical control circuits, which may be located on the same integrated circuit or on different chips of a multi-chip module. The materials may include components that reduce defect densities and increase quantum coherence times. Multilayer fabrication techniques provide low-power and a path to large scale computing systems. An integrated circuit system for quantum computing is provided, comprising: a substrate; a kinetic inductance layer having a kinetic inductance of at least 5 pH/square; a plurality of stacked planarized superconducting layers and intervening insulating layers, formed into a plurality of Josephson junctions having a critical current of less than 100 ?A/?m2; and a resistive layer that remains non-superconducting at a temperature below 1 K, configured to damp the plurality of Josephson junctions.Type: ApplicationFiled: June 2, 2021Publication date: December 8, 2022Inventors: Daniel Yohannes, Mario Renzullo, John Vivalda, Alexander Kirichenko
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Patent number: 11508896Abstract: Materials and methods are disclosed for fabricating superconducting integrated circuits for quantum computing at millikelvin temperatures, comprising both quantum circuits and classical control circuits, which may be located on the same integrated circuit or on different chips of a multi-chip module. The materials may include components that reduce defect densities and increase quantum coherence times. Multilayer fabrication techniques provide low-power and a path to large scale computing systems. An integrated circuit system for quantum computing is provided, comprising: a substrate; a kinetic inductance layer having a kinetic inductance of at least 5 pH/square; a plurality of stacked planarized superconducting layers and intervening insulating layers, formed into a plurality of Josephson junctions having a critical current of less than 100 ?A/?m2; and a resistive layer that remains non-superconducting at a temperature below 1 K, configured to damp the plurality of Josephson junctions.Type: GrantFiled: June 2, 2021Date of Patent: November 22, 2022Assignee: Seeqc, inc.Inventors: Daniel Yohannes, Mario Renzullo, John Vivalda, Alexander Kirichenko
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Patent number: 8744541Abstract: A superconducting multi-bit digital mixer, designed using rapid single flux quantum (RSFQ) logic, for multiplying two independent digital streams, at least one of these comprising a plurality of parallel bit lines, wherein the output is also a similar plurality of bit lines. In a preferred embodiment, one of the digital streams represents a local oscillator signal, and the other digital stream digital radio frequency input from an analog-to-digital converter. The multi-bit mixer comprises an array of bit-slices, with the local oscillator signal generated using shift registers. This multi-bit mixer is suitable for an integrated circuit with application to a broadband digital radio frequency receiver, a digital correlation receiver, or a digital radio frequency transmitter. A synchronous pulse distribution network is used to ensure proper operation at data rates of 20 GHz or above.Type: GrantFiled: March 19, 2013Date of Patent: June 3, 2014Assignee: Hypres, Inc.Inventors: Timur V. Filippov, Alexander Kirichenko, Deepnarayan Gupta
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Publication number: 20080101444Abstract: A digital radio frequency switch system and method, adapted to receive a plurality of inputs, generate a plurality of outputs, and simultaneously route a plurality of inputs to any of a plurality of outputs, comprising an array comprising a plurality of inputs, having a plurality of associated clocks; a digital control input adapted to receive a signal indicative of a mapping between at least one of said inputs and at least one respective output; a digital logic array, responsive to said digital control input for simultaneously communicating a plurality of signals each corresponding to one of the plurality of inputs and a respective associated clock to at least one of said outputs indicated by the digital control input; and an array of the outputs, each adapted to present a regenerated signal corresponding to one of the plurality of inputs and a respective associated synchronized regenerated clock maintaining accurate relative timing therebetween.Type: ApplicationFiled: December 28, 2007Publication date: May 1, 2008Applicant: HYPRES INC.Inventors: Deepnarayan Gupta, Alexander Kirichenko
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Publication number: 20070075752Abstract: A digital programmable frequency divider is constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ non-destructive readout cell (NDRO), and RSFQ D flip-flop and an RSFQ T flip-flop. A digital word comprising N bits is used to control the amount of frequency division and the frequency divider selectively imparts a respective frequency division for any of 2N states that can be represented by the digital word. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.Type: ApplicationFiled: October 4, 2005Publication date: April 5, 2007Applicant: HYPRES, INC.Inventor: Alexander Kirichenko
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Publication number: 20070077906Abstract: Digital mixers which permit mixing of asynchronous signals is constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ non-destructive readout cell (NDRO), an RSFQ D flip-flop, an RSFQ XOR circuit, and an RSFQ T flip-flop. A binary tree arrangement of T flip-flops can be used to provide in-phase and quadrature phase-divided replicas of a reference signal. The mixing elements can be either an XOR circuit, a dual port NDRO circuit functioning as a multiplexer or an RS type NDRO functioning as an AND gate. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.Type: ApplicationFiled: October 4, 2005Publication date: April 5, 2007Applicant: HYPRES, INC.Inventors: Alexander Kirichenko, Deepnarayan Gupta, Saad Sarwana
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Publication number: 20070075729Abstract: A programmable phase shifter is constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ inverter and an RSFQ T flip-flop. A digital word comprising N bits is used to control the amount of phase shift and the phase shifter selectively imparts a respective phase shift for any of 2N states that can be represented by the digital word. The RSFQ logic elements utilize Josephson junctions which operate in the superconducting temperature domain.Type: ApplicationFiled: October 4, 2005Publication date: April 5, 2007Applicant: HYPRES, INC.Inventor: Alexander Kirichenko