Abstract: A circuit providing protection against electrostatic discharge (ESD) for internal elements of an Integrated Circuit (IC). In one example, a protection circuit comprises a PMOSFET resistor (R) having a gate connected to a ground rail (VSS), a drain connected to an input node (ESD_RC) of an inverter (INV), a source and a bulk of the PMOSFET resistor (R) being connected to a power rail (VDD). The circuit also comprises an NMOSFET capacitor (C1) having a gate connected to the input node (ESD_RC) of the inverter (INV), a drain, a source and a bulk of the NMOSFET capacitor (C1) being connected to the ground rail (VSS). The circuit also includes a PMOSFET capacitor (C2) having a gate connected to the input node (ESD_RC) of the inverter (INV). A drain and a source of the PMOSFET capacitor (C2) being connected to the ground rail (VSS), and a bulk of the PMOSFET capacitor (C2) is connected to the power rail (VDD).

Abstract: A circuit providing protection against electrostatic discharge (ESD) for internal elements of an Integrated Circuit (IC) is connected to a power rail (VDD) and a ground rail (VSS) and to an inverter (INV) of a clamp preamplifier. The protection circuit comprises a PMOSFET resistor (R) with a gate connected to said ground rail (VSS), a drain connected to said inverter's (INV) input node (ESD_RC), a source and a bulk connected to said power rail (VDD). The circuit also comprises an NMOSFET capacitor (C1) with a gate connected to said inverter's (INV) input node (ESD_RC), a drain, a source and a bulk connected to said ground rail (VSS), and a PMOSFET connector (C2) with a gate connected to said inverter's (INV) input node (ESD_RC), a drain, a source connected to said ground rail (VSS) and a bulk connected to said power rail (VDD).

Abstract: A variable capacitor modulator for use in a voltage controlled oscillator, includes a differential varactor block, coupling capacitors for connecting nodes of the varactor block to a tank circuit, and an element connected between the respective nodes and ground to trim the gain of the variable capacitor modulator.

Abstract: An Electrostatic Discharge (ESD) protection circuit (9) includes a plurality of I/O and power supply pad cells (22, 40) that comprise external pads (31, 41) and circuitry requiring ESD protection. The protection circuit includes an array of shunting devices (36, 46) coupled in parallel between an ESD bus (14) and a VSS bus (18) and distributed among the plurality of pad cells. One or more trigger circuits (50) control the shunting devices. ESD events are coupled from any stressed pad onto two separate buses: the ESD bus which routes the high ESD currents to the positive current electrodes of the multiple shunting devices, and a Boost bus (12) which controls the trigger circuits. During an ESD event, the trigger circuits drive the control electrodes of the shunting devices to a voltage level greater than possible with prior art circuits, thereby reducing the on-resistance of the shunting devices.

Abstract: An Electrostatic Discharge (ESD) protection circuit (9) includes a plurality of I/O and power supply pad cells (22, 40) that comprise external pads (31, 41) and circuitry requiring ESD protection. The protection circuit includes an array of shunting devices (36, 46) coupled in parallel between an ESD bus (14) and a VSS bus (18) and distributed among the plurality of pad cells. One or more trigger circuits (50) control the shunting devices. ESD events are coupled from any stressed pad onto two separate buses: the ESD bus which routes the high ESD currents to the positive current electrodes of the multiple shunting devices, and a Boost bus (12) which controls the trigger circuits. During an ESD event, the trigger circuits drive the control electrodes of the shunting devices to a voltage level greater than possible with prior art circuits, thereby reducing the on-resistance of the shunting devices.