Patents by Inventor Alexander Kwok-Tung Mak
Alexander Kwok-Tung Mak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9760307Abstract: An array of non-volatile memory cells includes a first plurality of nonvolatile memory cells and a second plurality of non-volatile memory cells. The first plurality of memory cells, which have first diameters of memory holes, are assigned to store portions of data that are not frequently read. The second plurality of memory cells, which have second diameters of memory holes, are assigned to store portions of data that are frequently read. The first diameters are smaller than the second diameters.Type: GrantFiled: September 22, 2015Date of Patent: September 12, 2017Assignee: SanDisk Technologies LLCInventors: Chris Avila, Yingda Dong, Alexander Kwok-Tung Mak, Steven T. Sprouse
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Publication number: 20160026410Abstract: In a nonvolatile memory array, such as a three-dimensional array of charge-storage memory cells, data is scrubbed according to a scheme which weights particular data that is exposed to potentially damaging voltages. Data that may cause damage to other data is moved to a location where such potential damage is reduced.Type: ApplicationFiled: September 22, 2015Publication date: January 28, 2016Inventors: Chris Avila, Yingda Dong, Alexander Kwok-Tung Mak, Steven T. Sprouse
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Patent number: 9240241Abstract: A 3D NAND stacked non-volatile memory device, comprising: a string comprising a plurality of non-volatile storage elements, the string comprises a channel and extends vertically through layers of the 3D stacked non-volatile memory device, and the plurality of storage elements are subdivided into different groups based on group assignments, each group of the different groups comprises multiple adjacent storage elements of the plurality of storage elements; and a control circuit in communication with the string, the control circuit, to perform a Pseudo Block Operation Mode.Type: GrantFiled: December 8, 2014Date of Patent: January 19, 2016Assignee: SanDisk Technologies Inc.Inventors: Xiying Costa, Alexander Kwok-Tung Mak, Chris Avila, Gautam Dusija, Man Mui
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Patent number: 9230656Abstract: In a nonvolatile memory array in which a NAND string includes a back gate that has a charge storage element, the threshold voltage of the back gate is monitored, and if the threshold voltage deviates from a desired threshold voltage range, charge is added to, or removed from the charge storage element to return the threshold voltage to the desired threshold voltage range.Type: GrantFiled: June 26, 2013Date of Patent: January 5, 2016Assignee: SanDisk Technologies Inc.Inventors: Chris Nga Yee Avila, Gautam Ashok Dusija, Yingda Dong, Jian Chen, Man Lung Mui, Alexander Kwok-Tung Mak, Seungpil Lee
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Patent number: 9218890Abstract: When data from a portion of a three dimensional NAND memory array is determined to be uncorrectable by Error Correction Code (ECC), a determination is made as to whether data is uncorrectable by ECC throughout some unit that is larger than the portion. If modified read conditions provide ECC correctable data, the modified read conditions are recorded for subsequent reads of the larger unit.Type: GrantFiled: June 3, 2013Date of Patent: December 22, 2015Assignee: SanDisk Technologies Inc.Inventors: Chris Nga Yee Avila, Gautam Ashok Dusija, Jian Chen, Yingda Dong, Man Lung Mui, Seungpil Lee, Alexander Kwok-Tung Mak
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Patent number: 9183086Abstract: Portions of data stored in a three dimensional memory array are selected based on their locations for calculation of redundancy data. Locations are selected so that no two portions in a set of portions for a given calculation are likely to become uncorrectable at the same time. Selected portions may be separated by at least one word line and separated by at least one string in a block.Type: GrantFiled: June 3, 2013Date of Patent: November 10, 2015Assignee: SanDisk Technologies Inc.Inventors: Chris Nga Yee Avila, Gautam Ashok Dusija, Jian Chen, Yingda Dong, Man Lung Mui, Seungpil Lee, Alexander Kwok-Tung Mak
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Patent number: 9171620Abstract: In a nonvolatile memory array, such as a three-dimensional array of charge-storage memory cells, data is scrubbed according to a scheme which weights particular data that is exposed to potentially damaging voltages. Data that may cause damage to other data is moved to a location where such potential damage is reduced.Type: GrantFiled: March 13, 2013Date of Patent: October 27, 2015Assignee: SanDisk Technologies Inc.Inventors: Chris Nga Yee Avila, Yingda Dong, Alexander Kwok-Tung Mak, Steven T. Sprouse
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Patent number: 9070481Abstract: A method of operation in a non-volatile memory device, including executing a memory operation with respect to a portion of a non-volatile memory device, and measuring a current corresponding to current drawn by at least the portion of the non-volatile memory device during the memory operation. An age metric is determined for at least the portion of the non-volatile memory device based on age criteria including a characteristic of the measured current. In accordance with a determination that the age metric satisfies one or more predefined threshold criteria, one or more configuration parameters associated with the non-volatile memory device are adjusted. After the adjusting, data is read from and data to the portion of the non-volatile memory device according to the one or more adjusted configuration parameters.Type: GrantFiled: June 6, 2014Date of Patent: June 30, 2015Assignee: SANDISK TECHNOLOGIES INC.Inventors: Robert W. Ellis, James M. Higgins, Alexander Kwok-Tung Mak
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Patent number: 9063671Abstract: Data that is stored in a higher error rate format in a nonvolatile memory is backed up in a lower error rate format. Data to be stored may be transferred once to on-chip data latches where it is maintained while it is programmed in both the high error rate format and the low error rate format without being resent to the nonvolatile memory. High error rate format may be MLC format and programming in the high error rate format may program both lower page and upper page data together in a full sequence programming scheme that is suitable for handling high data volume.Type: GrantFiled: July 2, 2013Date of Patent: June 23, 2015Assignee: SanDisk Technologies Inc.Inventors: Chris Nga Yee Avila, Gautam Ashok Dusija, Jian Chen, Alexander Kwok-Tung Mak, Seungpil Lee, Mrinal Kochar, Pao-Ling Koh
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Patent number: 9058881Abstract: Multiple bits of data are programmed together to each cell of a segment of a word line while other segments of the same word line are unprogrammed. Subsequently, additional segments are similarly programmed. Data is read from a partially programmed word line (with a mix of programmed and unprogrammed segments) using a single reading scheme.Type: GrantFiled: December 5, 2013Date of Patent: June 16, 2015Assignee: SanDisk Technologies Inc.Inventors: Gautam A. Dusija, Chris Avila, Deepak Raghu, Yingda Dong, Man Mui, Alexander Kwok-Tung Mak, Pao-Ling Koh
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Publication number: 20150162086Abstract: Multiple bits of data are programmed together to each cell of a segment of a word line while other segments of the same word line are unprogrammed. Subsequently, additional segments are similarly programmed. Data is read from a partially programmed word line (with a mix of programmed and unprogrammed segments) using a single reading scheme.Type: ApplicationFiled: December 5, 2013Publication date: June 11, 2015Applicant: SanDisk Technologies Inc.Inventors: Gautam A. Dusija, Chris Avila, Deepak Raghu, Yingda Dong, Man Mui, Alexander Kwok-Tung Mak, Pao-Ling Koh
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Publication number: 20150121156Abstract: Memory hole diameter in a three dimensional memory array may be calculated from characteristics that are observed during programming. Suitable operating parameters may be selected for operating a block based on memory hole diameters. Hot counts of blocks may be adjusted according to memory hole size so that blocks that are expected to fail earlier because of small memory holes are more lightly used than blocks with larger memory holes.Type: ApplicationFiled: October 28, 2013Publication date: April 30, 2015Applicant: SanDisk Technologies Inc.Inventors: Deepak Raghu, Gautam A. Dusija, Chris Avila, Yingda Dong, Man Mui, Alexander Kwok-Tung Mak, Pao-Ling Koh
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Publication number: 20150092493Abstract: A 3D NAND stacked non-volatile memory device, comprising: a string comprising a plurality of non-volatile storage elements, the string comprises a channel and extends vertically through layers of the 3D stacked non-volatile memory device, and the plurality of storage elements are subdivided into different groups based on group assignments, each group of the different groups comprises multiple adjacent storage elements of the plurality of storage elements; and a control circuit in communication with the string, the control circuit, to perform a Pseudo Block Operation Mode.Type: ApplicationFiled: December 8, 2014Publication date: April 2, 2015Applicant: SanDisk Technologies Inc.Inventors: Xiying Costa, Alexander Kwok-Tung Mak, Chris Avila, Gautam Dusija, Man Mui
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Patent number: 8964467Abstract: Multiple bits of data are programmed together to each cell of a segment of a word line while other segments of the same word line are unprogrammed. Subsequently, additional segments are similarly programmed. Data is read from a partially programmed word line (with a mix of programmed and unprogrammed segments) using a single reading scheme.Type: GrantFiled: May 22, 2014Date of Patent: February 24, 2015Assignee: SanDisk Technologies Inc.Inventors: Gautam A. Dusija, Chris Avila, Deepak Raghu, Yingda Dong, Man Mui, Alexander Kwok-Tung Mak, Pao-Ling Koh
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Publication number: 20150012684Abstract: Data that is stored in a higher error rate format in a nonvolatile memory is backed up in a lower error rate format. Data to be stored may be transferred once to on-chip data latches where it is maintained while it is programmed in both the high error rate format and the low error rate format without being resent to the nonvolatile memory. High error rate format may be MLC format and programming in the high error rate format may program both lower page and upper page data together in a full sequence programming scheme that is suitable for handling high data volume.Type: ApplicationFiled: July 2, 2013Publication date: January 8, 2015Inventors: Chris Nga Yee Avila, Gautam Ashok Dusija, Jian Chen, Alexander Kwok-Tung Mak, Seungpil Lee, Mrinal Kochar, Pao-Ling Koh
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Publication number: 20150003161Abstract: In a nonvolatile memory array in which a NAND string includes a back gate that has a charge storage element, the threshold voltage of the back gate is monitored, and if the threshold voltage deviates from a desired threshold voltage range, charge is added to, or removed from the charge storage element to return the threshold voltage to the desired threshold voltage range.Type: ApplicationFiled: June 26, 2013Publication date: January 1, 2015Applicant: SanDisk Technologies Inc.Inventors: Chris Nga Yee Avila, Gautam Ashok Dusija, Yingda Dong, Jian Chen, Man Lung Mui, Alexander Kwok-Tung Mak, Seungpil Lee
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Patent number: 8924626Abstract: A method and system for phasing power-intensive operations is disclosed. A non-volatile storage device controller detects a power reset. The controller is in communication with non-volatile memories in the non-volatile storage device. In response to detecting a power reset, the controller determines a current consumption necessary to reset the non-volatile memories in the non-volatile storage device. The controller simultaneously resets all of the non-volatile memories when the determined current consumption is less than a current consumption threshold. If the determined current consumption is greater than the current consumption threshold, the controller resets a first subset of the plurality of non-volatile memories, and after a predetermined delay, resets a second subset of the non-volatile memories. Therefore, a power-intensive operation may be performed without exceeding a current consumption threshold by dividing the operation into a sequence of steps that do not exceed the threshold.Type: GrantFiled: April 29, 2010Date of Patent: December 30, 2014Assignee: SanDisk Technologies Inc.Inventors: Steven S. Cheng, Dennis Ea, Jianmin Huang, Alexander Kwok-Tung Mak, Farookh Moogat
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Publication number: 20140369123Abstract: A 3D NAND stacked non-volatile memory device, comprising: a string comprising a plurality of non-volatile storage elements, the string comprises a channel and extends vertically through layers of the 3D stacked non-volatile memory device, and the plurality of storage elements are subdivided into different groups based on group assignments, each group of the different groups comprises multiple adjacent storage elements of the plurality of storage elements; and a control circuit in communication with the string, the control circuit, to perform a Pseudo Block Operation Mode.Type: ApplicationFiled: May 9, 2014Publication date: December 18, 2014Applicant: SanDisk Technologies Inc.Inventors: Xiying Costa, Alexander Kwok-Tung Mak, Chris Avila, Gautam Dusija, Man Mui
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Publication number: 20140369122Abstract: A 3D NAND stacked non-volatile memory device, comprising: a string comprising a plurality of non-volatile storage elements, the string comprises a channel and extends vertically through layers of the 3D stacked non-volatile memory device, and the plurality of storage elements are subdivided into different groups based on group assignments, each group of the different groups comprises multiple adjacent storage elements of the plurality of storage elements; and a control circuit in communication with the string, the control circuit, to perform a Pseudo Block Operation Mode.Type: ApplicationFiled: January 10, 2014Publication date: December 18, 2014Applicant: SanDisk Technologies Inc.Inventors: Xiying Costa, Alexander Kwok-Tung Mak, Chris Avila, Gautam Dusija, Man Mui
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Patent number: 8913431Abstract: A 3D NAND stacked non-volatile memory device, comprising: a string comprising a plurality of non-volatile storage elements, the string comprises a channel and extends vertically through layers of the 3D stacked non-volatile memory device, and the plurality of storage elements are subdivided into different groups based on group assignments, each group of the different groups comprises multiple adjacent storage elements of the plurality of storage elements; and a control circuit in communication with the string, the control circuit, to perform a Pseudo Block Operation Mode.Type: GrantFiled: May 9, 2014Date of Patent: December 16, 2014Assignee: SanDisk Technologies Inc.Inventors: Xiying Costa, Alexander Kwok-Tung Mak, Chris Avila, Gautam Dusija, Man Mui