Patents by Inventor Alexander Loui
Alexander Loui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210103777Abstract: Embodiments of the present disclosure relate to a recurrent framework based on Recurrent Highway Networks (RHNs) for sequence modeling using batch normalization. In certain embodiments, constraints within the RHNs are relaxed to reduce or avoid gradient vanishing or exploding by normalizing the current transition units in highway layers.Type: ApplicationFiled: December 18, 2020Publication date: April 8, 2021Applicant: Kodak Alaris Inc.Inventors: Chi ZHANG, Raymond PTUCHA, Alexander LOUI, Carl SALVAGGIO
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Publication number: 20210083676Abstract: Non-destructive read out (NDRO) circuits are provided for use in reciprocal quantum logic (RQL) superconducting systems. Each NDRO circuit includes a “body” circuit that provides a single or multi-state sub-critical bias current to one or many independent “tail” circuitries. Each “tail” has minimal effect on the “body” thereby preventing any interference or destruction to the state of the “body” circuitry. The circuits reduce device count and thereby increase circuit density, simplify and reduce the cost of fabrication, and provide functionality not available in existing designs, such as the ability to write a state and read it in the same operation cycle. The NDRO circuits provide more compact unit cells useful in memory or logic arrays, demanding fewer resources with increased functionality. The circuits also provide compact cells for AND, AND-OR, A-NOT-B, inverter, multiplexer, and demultiplexer gates.Type: ApplicationFiled: November 10, 2020Publication date: March 18, 2021Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: ANNA Y. HERR, QUENTIN P. HERR, RYAN EDWARD CLARKE, HAROLD CLIFTON HEARNE, III, ALEXANDER LOUIS BRAUN, RANDALL M. BURNETT, TIMOTHY CHI-CHAO LEE
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Patent number: 10892761Abstract: A reciprocal quantum logic (RQL) wave-pipeline logic (WPL) inverting gate includes a Josephson junction-based comparator that corrects a design weakness present in other RQL WPL inverting gates that can lead to the propagation of glitches under certain timing conditions. With selective placement of pulse generators at the inputs, the RQL WPL inverting gate can be used to construct A AND (B XOR C) gates, XOR gates, NOT gates, and A-AND-NOT-B gates.Type: GrantFiled: March 18, 2020Date of Patent: January 12, 2021Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventor: Alexander Louis Braun
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Patent number: 10872273Abstract: Embodiments of the present disclosure relate to a recurrent framework based on Recurrent Highway Networks (RHNs) for sequence modeling using batch normalization. In certain embodiments, constraints within the RHNs are relaxed to reduce or avoid gradient vanishing or exploding by normalizing the current transition units in highway layers.Type: GrantFiled: May 1, 2018Date of Patent: December 22, 2020Assignee: Kodak Alaris Inc.Inventors: Chi Zhang, Raymond Ptucha, Alexander Loui, Carl Salvaggio
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Patent number: 10868540Abstract: Non-destructive read out (NDRO) circuits are provided for use in reciprocal quantum logic (RQL) superconducting systems. Each NDRO circuit includes a “body” circuit that provides a single or multi-state sub-critical bias current to one or many independent “tail” circuitries. Each “tail” has minimal effect on the “body” thereby preventing any interference or destruction to the state of the “body” circuitry. The circuits reduce device count and thereby increase circuit density, simplify and reduce the cost of fabrication, and provide functionality not available in existing designs, such as the ability to write a state and read it in the same operation cycle. The NDRO circuits provide more compact unit cells useful in memory or logic arrays, demanding fewer resources with increased functionality. The circuits also provide compact cells for AND, AND-OR, A-NOT-B, inverter, multiplexer, and demultiplexer gates.Type: GrantFiled: December 2, 2019Date of Patent: December 15, 2020Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: Anna Y. Herr, Quentin P. Herr, Ryan Edward Clarke, Harold Clifton Hearne, III, Alexander Louis Braun, Randall M. Burnett, Timothy Chi-Chao Lee
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Patent number: 10756712Abstract: A reciprocal quantum logic (RQL) phase-mode flip-flop includes a storage loop and a comparator, each of which includes Josephson junctions (JJs). A data input, provided as a positive or negative single flux quantum (SFQ) pulse, is stored in the storage loop to set the storage loop in a positive or negative state, respectively, effectively biasing an output JJ shared between the storage loop and a comparator. The data input is captured to the output upon the receipt of a logical clock SFQ reciprocal pulse pair to the comparator, when one of the pulses in the pair causes the output JJ to preferentially trigger over an escape junction in the comparator, owing to the output JJ having been biased by current in the storage loop.Type: GrantFiled: November 13, 2017Date of Patent: August 25, 2020Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventor: Alexander Louis Braun
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Patent number: 10706549Abstract: A system and method that performs iterative foreground detection and multi-object segmentation in an image is disclosed herein. A new background prior is introduced to improve the foreground segmentation results. Three complimentary methods detect and segment foregrounds containing multiple objects. The first method performs an iterative segmentation of the image to pull out the salient objects in the image. In a second method, a higher dimensional embedding of the image graph is used to estimate the saliency score and extract multiple salient objects. A third method uses a metric to automatically pick the number of eigenvectors to consider in an alternative method to iteratively compute the image saliency map. Experimental results show that these methods succeed in accurately extracting multiple foreground objects from an image.Type: GrantFiled: December 19, 2017Date of Patent: July 7, 2020Assignee: KODAK ALARIS INC.Inventors: Alexander Loui, David Kloosterman, Michal Kucer, Nathan Cahill, David Messinger
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Patent number: 10615783Abstract: A reciprocal quantum logic (RQL) phase-mode D flip-flop accepts a data input and a logical clock input. A D flip-flop with an enable input further accepts enable input and further requires that the enable be asserted high to allow the data input to change the output on the logical clock pulse. The flip-flop includes a storage loop and a comparator, each of which includes Josephson junctions (JJs). The storage loop stores the data input, provided as a positive or negative single flux quantum (SFQ) pulse, is stored in the storage loop as positive or negative state, respectively, effectively biasing a JJ shared between the storage loop and the comparator. The data input is captured to the output upon clocking (or enabled clocking), when a clock pulse causes the shared JJ to preferentially trigger over an escape JJ in the comparator, the shared JJ having been biased by storage loop current.Type: GrantFiled: July 31, 2018Date of Patent: April 7, 2020Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: Jack R. Powell, III, Alexander Louis Braun
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Publication number: 20200106444Abstract: Non-destructive read out (NDRO) circuits are provided for use in reciprocal quantum logic (RQL) superconducting systems. Each NDRO circuit includes a “body” circuit that provides a single or multi-state sub-critical bias current to one or many independent “tail” circuitries. Each “tail” has minimal effect on the “body” thereby preventing any interference or destruction to the state of the “body” circuitry. The circuits reduce device count and thereby increase circuit density, simplify and reduce the cost of fabrication, and provide functionality not available in existing designs, such as the ability to write a state and read it in the same operation cycle. The NDRO circuits provide more compact unit cells useful in memory or logic arrays, demanding fewer resources with increased functionality. The circuits also provide compact cells for AND, AND-OR, A-NOT-B, inverter, multiplexer, and demultiplexer gates.Type: ApplicationFiled: December 2, 2019Publication date: April 2, 2020Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: ANNA Y. HERR, QUENTIN P. HERR, RYAN EDWARD CLARKE, HAROLD CLIFTON HEARNE, III, ALEXANDER LOUIS BRAUN, RANDALL M. BURNETT, TIMOTHY CHI-CHAO LEE
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Publication number: 20200044632Abstract: A reciprocal quantum logic (RQL) phase-mode D flip-flop accepts a data input and a logical clock input. A D flip-flop with an enable input further accepts enable input and further requires that the enable be asserted high to allow the data input to change the output on the logical clock pulse. The flip-flop includes a storage loop and a comparator, each of which includes Josephson junctions (JJs). The storage loop stores the data input, provided as a positive or negative single flux quantum (SFQ) pulse, is stored in the storage loop as positive or negative state, respectively, effectively biasing a JJ shared between the storage loop and the comparator. The data input is captured to the output upon clocking (or enabled clocking), when a clock pulse causes the shared JJ to preferentially trigger over an escape JJ in the comparator, the shared JJ having been biased by storage loop current.Type: ApplicationFiled: July 31, 2018Publication date: February 6, 2020Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: JACK R. POWELL, III, ALEXANDER LOUIS BRAUN
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Publication number: 20200044656Abstract: Non-destructive read out (NDRO) circuits are provided for use in reciprocal quantum logic (RQL) superconducting systems. Each NDRO circuit includes a “body” circuit that provides a single or multi-state sub-critical bias current to one or many independent “tail” circuitries. Each “tail” has minimal effect on the “body” thereby preventing any interference or destruction to the state of the “body” circuitry. The circuits reduce device count and thereby increase circuit density, simplify and reduce the cost of fabrication, and provide functionality not available in existing designs, such as the ability to write a state and read it in the same operation cycle. The NDRO circuits provide more compact unit cells useful in memory or logic arrays, demanding fewer resources with increased functionality. The circuits also provide compact cells for AND, AND-OR, A-NOT-B, inverter, multiplexer, and demultiplexer gates.Type: ApplicationFiled: July 31, 2018Publication date: February 6, 2020Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: ANNA Y. HERR, QUENTIN P. HERR, RYAN EDWARD CLARKE, HAROLD CLIFTON HEARNE, III, ALEXANDER LOUIS BRAUN, RANDALL M. BURNETT, TIMOTHY CHI-CHAO LEE
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Patent number: 10554207Abstract: Non-destructive read out (NDRO) circuits are provided for use in reciprocal quantum logic (RQL) superconducting systems. Each NDRO circuit includes a “body” circuit that provides a single or multi-state sub-critical bias current to one or many independent “tail” circuitries. Each “tail” has minimal effect on the “body” thereby preventing any interference or destruction to the state of the “body” circuitry. The circuits reduce device count and thereby increase circuit density, simplify and reduce the cost of fabrication, and provide functionality not available in existing designs, such as the ability to write a state and read it in the same operation cycle. The NDRO circuits provide more compact unit cells useful in memory or logic arrays, demanding fewer resources with increased functionality. The circuits also provide compact cells for AND, AND-OR, A-NOT-B, inverter, multiplexer, and demultiplexer gates.Type: GrantFiled: July 31, 2018Date of Patent: February 4, 2020Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: Anna Y. Herr, Quentin P. Herr, Ryan Edward Clarke, Harold Clifton Hearne, III, Alexander Louis Braun, Randall M. Burnett, Timothy Chi-Chao Lee
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Patent number: 10447279Abstract: An inverting reciprocal quantum logic (RQL) phase-mode D flip-flop accepts a data input and a logical clock input. The flip-flop includes a stacked Josephson junction and a comparator. The triggering or untriggering of the stacked Josephson junction by positive or negative single flux quantum (SFQ) pulses can switch a direction of DC bias current through a component of the comparator, such as an output Josephson junction, which can then either pass or suppress logical clock SFQ pulses. When so passed, the data input is captured to the output upon clocking the flip-flop via the provision of the logical clock SFQ pulses, e.g., as reciprocal pulse pairs.Type: GrantFiled: November 30, 2018Date of Patent: October 15, 2019Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventor: Alexander Louis Braun
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Publication number: 20190149139Abstract: A reciprocal quantum logic (RQL) phase-mode flip-flop includes a storage loop and a comparator, each of which includes Josephson junctions (JJs). A data input, provided as a positive or negative single flux quantum (SFQ) pulse, is stored in the storage loop to set the storage loop in a positive or negative state, respectively, effectively biasing an output JJ shared between the storage loop and a comparator. The data input is captured to the output upon the receipt of a logical clock SFQ reciprocal pulse pair to the comparator, when one of the pulses in the pair causes the output JJ to preferentially trigger over an escape junction in the comparator, owing to the output JJ having been biased by current in the storage loop.Type: ApplicationFiled: November 13, 2017Publication date: May 16, 2019Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventor: ALEXANDER LOUIS BRAUN
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Publication number: 20190023298Abstract: A multipurpose mobile utility lifting ergonomic cart consists of a structural frame, a platform, at least one insert, a plurality of wheels, and a height-adjustable arm. The height-adjustable arm extends from the structural frame and is connected to the platform so that the platform can be positioned at varying heights. The platform provides workspace for the user by being attached to the at least one insert that can be, but is not limited to, a dish drying rack, a podium insert, or a house cleaner rack. The structural frame can be used for holding items such as boxes or cleaning supplies. The plurality of wheels allows the user to move the apparatus from one location to another.Type: ApplicationFiled: September 21, 2018Publication date: January 24, 2019Inventor: Alexander Louis Carzola
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Patent number: 10171087Abstract: Large fan-in logical gate circuits for use in reciprocal quantum logic (RQL) systems and related methods permit for improved efficiency and density of RQL logic. A majority 3-of-5 gate circuit, as described, can be extended to include more than five inputs, and can also be modified to create AND gates, OR gates, and OA gates. The gate circuits can accommodate inputs and provide outputs each in the form of single flux quantum (SFQ) pulses, either positive or negative, to indicate asserted and de-asserted logic states, respectively.Type: GrantFiled: November 13, 2017Date of Patent: January 1, 2019Assignee: Northrop Grumman Systems CorporationInventor: Alexander Louis Braun
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Patent number: 10158363Abstract: A Josephson AND/OR gate circuit makes efficient use of Josephson junction (JJ) and inductor components to provide two-input, two-output AND/OR logical functions. The circuit includes four logical input storage loops that each contain one of two logical decision JJs that are configured such that they trigger to provide the OR and AND signals, respectively. Functional asymmetry is provided in the topologically symmetrical AND/OR gate circuit by a bias storage loop that includes both of the logical decision JJs and that is initialized to store a directional ?0 of current at system start-up.Type: GrantFiled: November 13, 2017Date of Patent: December 18, 2018Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventor: Alexander Louis Braun
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Patent number: 10147484Abstract: An inverting reciprocal quantum logic (RQL) gate circuit has an input stage having a logical input asserted based on receiving a positive single flux quantum (SFQ) pulse and an output stage comprising phase mode logic (PML) inverter circuitry. The input stage includes one or more storage loops, at least one being associated with each logical input, each comprising an input Josephson junction (JJ), a storage inductor, and a logical decision JJ, the logical decision JJ being common to all the storage loops associated with the logical inputs and being configured to trigger based on biasing provided by one or more currents stored in the storage loops and a first bias signal provided to the input stage. The output stage de-asserts an output and is provided with a second bias signal having a second state opposite of a first state of the first bias signal.Type: GrantFiled: November 13, 2017Date of Patent: December 4, 2018Assignee: NORTHRUP GRUMMAN SYSTEMS CORPORATIONInventor: Alexander Louis Braun
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Patent number: D847548Type: GrantFiled: August 18, 2017Date of Patent: May 7, 2019Inventor: Alexander Louis Carzola
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Patent number: D862026Type: GrantFiled: October 1, 2018Date of Patent: October 1, 2019Inventor: Alexander Louis Carzola