Abstract: Image sensor systems are disclosed that allow for charge transfer between pixels of a group included in a pixel array with a single digital readout of the accumulated charge from the group. Each of the pixels within a given group includes a photodetector. One or more pump gates are arranged between adjacent pixels of the given group to allow charge to be pumped from one pixel to the next in a serial fashion within the group. A readout circuit that includes at least a transfer gate and a capacitor may be coupled to a final pixel of the group to receive the accumulated charge and generate a photodetector signal (based on the accumulated charge) that can be amplified via a source follower component and ultimately read out to a column amplifier.

Abstract: A given pixel of a pixel array includes various operation modes with each of the operation modes having a different conversion gain for the charge received from the photodetector of the pixel. When the modes are used in conjunction with one another, the dynamic range of the pixel can be increased. A readout circuit coupled to a photodetector within a given pixel includes a transfer gate between the photodetector and a gain mode select block that includes capacitors of different sizes and one or more switches to control which capacitors are to receive the charge from the photodetector. Depending on the state(s) of the one or more switches, different operation modes with different conversion gains can be selected to increase the dynamic range of the pixel. The adaptability of the readout circuit can allow for a high dynamic range even in extreme temperature environments by lowering the dark current.

Abstract: Structures are disclosed for a binned set of two or more pixels of a pixel array that share a same readout circuit. The binned pixel design provides space-saving benefits on the chip and also improves the overall image quality. According to some embodiments, each of the binned pixels includes a photodetector and its own transfer gate. The readout circuit is coupled to the transfer gates of each of the binned pixels and includes its own second transfer gate that separates the pixels from a gain mode select block. The gain mode select block may include capacitors of different sizes and one or more switches to control which capacitors are to receive the charge from any one of the binned pixels. The readout circuit may also include a potential barrier (such as a diode), which allows for pumping charge onto the one or more capacitors of the gain mode select block.

Abstract: A given pixel of a pixel array includes various operation modes with each of the operation modes having a different conversion gain for the charge received from the photodetector of the pixel. When the modes are used in conjunction with one another, the dynamic range of the pixel can be increased. A readout circuit coupled to a photodetector within a given pixel includes a transfer gate between the photodetector and a gain mode select block that includes capacitors of different sizes and one or more switches to control which capacitors are to receive the charge from the photodetector. Depending on the state(s) of the one or more switches, different operation modes with different conversion gains can be selected to increase the dynamic range of the pixel. The adaptability of the readout circuit can allow for a high dynamic range even in extreme temperature environments by lowering the dark current.

Abstract: Implementations described herein relate to causing emoji(s) that are associated with a given emotion class expressed by a spoken utterance to be visually rendered for presentation to a user at a display of a client device of the user. Processor(s) of the client device may receive audio data that captures the spoken utterance, process the audio data to generate textual data that is predicted to correspond to the spoken utterance, and cause a transcription of the textual data to be visually rendered for presentation to the user via the display. Further, the processor(s) may determine, based on processing the textual data, whether the spoken utterance expresses a given emotion class. In response to determining that the spoken utterance expresses the given emotion class, the processor(s) may cause emoji(s) that are stored in association with the given emotion class to be visually rendered for presentation to the user via the display.

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a first substrate; a second substrate; and an array of interconnects electrically coupling the first substrate to the second substrate. In an embodiment, the array of interconnects comprises first interconnects, wherein the first interconnects have a first volume and a first material composition, and second interconnects, wherein the second interconnects have a second volume and a second material composition, and wherein the first volume is different than the second volume and/or the first material composition is different than the second material composition.

Abstract: An imaging device may include an image sensor that generates frames of image data in response to incident light with an array of image pixels, and processing circuitry that processes the image data. The processing circuitry may include a transformation circuit that applies transforms to subsampled frames of image data that are generated using a subset of the image pixels to produce transform values, and a comparator circuit that compares the transform values. The processing circuitry may determine that motion has occurred between sequential frames if a difference between a first transform value corresponding to a first image frame and a second transform value corresponding to a second image frame exceeds a threshold value. In response to determining that motion has occurred, the image sensor may generate full-frame image data using all of the pixels of the array of image pixels.

Abstract: An imaging device may include an image sensor that generates frames of image data in response to incident light with an array of image pixels, and processing circuitry that processes the image data. The processing circuitry may include a transformation circuit that applies transforms to subsampled frames of image data that are generated using a subset of the image pixels to produce transform values, and a comparator circuit that compares the transform values. The processing circuitry may determine that motion has occurred between sequential frames if a difference between a first transform value corresponding to a first image frame and a second transform value corresponding to a second image frame exceeds a threshold value. In response to determining that motion has occurred, the image sensor may generate full-frame image data using all of the pixels of the array of image pixels.

Abstract: An imaging device may include an image sensor that generates frames of image data in response to incident light with an array of image pixels, and processing circuitry that processes the image data. The processing circuitry may include a transformation circuit that applies transforms to subsampled frames of image data that are generated using a subset of the image pixels to produce transform values, and a comparator circuit that compares the transform values. The processing circuitry may determine that motion has occurred between sequential frames if a difference between a first transform value corresponding to a first image frame and a second transform value corresponding to a second image frame exceeds a threshold value. In response to determining that motion has occurred, the image sensor may generate full-frame image data using all of the pixels of the array of image pixels.

Abstract: Systems and methods for designing integrated circuits and for creating and using androgynous interfaces between electronic components of integrated circuits are disclosed. One preferred method of designing an integrated circuit includes several steps. In one step, a foundation block for the integrated circuit is specified, including specifying the locations of multiple androgynous interfaces in the integrated circuit. In another step, one or more component blocks to comprise the integrated circuit are identified for use. In another step, the component blocks to form a layout of the integrated circuit are positioned in a manner that minimizes connection distances between functional blocks and between functional blocks and the androgynous interfaces. In another step, the androgynous interfaces are set to perform as targets (slaves) or initiators (masters) based on the layout.

Abstract: Systems and methods for designing integrated circuits and for creating and using androgynous interfaces between electronic components of integrated circuits are disclosed. One preferred method of designing an integrated circuit includes several steps. In one step, a foundation block for the integrated circuit is specified, including specifying the locations of multiple androgynous interfaces in the integrated circuit. In another step, one or more component blocks to comprise the integrated circuit are identified for use. In another step, the component blocks to form a layout of the integrated circuit are positioned in a manner that minimizes connection distances between functional blocks and between functional blocks and the androgynous interfaces. In another step, the androgynous interfaces are set to perform as targets (slaves) or initiators (masters) based on the layout.

Abstract: Systems and methods for designing integrated circuits and for creating and using androgynous interfaces between electronic components of integrated circuits are disclosed. One preferred method of designing an integrated circuit includes several steps. In one step, a foundation block for the integrated circuit is specified, including specifying the locations of multiple androgynous interfaces in the integrated circuit. In another step, one or more component blocks to comprise the integrated circuit are identified for use. In another step, the component blocks to form a layout of the integrated circuit are positioned in a manner that minimizes connection distances between functional blocks and between functional blocks and the androgynous interfaces. In another step, the androgynous interfaces are set to perform as targets (slaves) or initiators (masters) based on the layout.

Abstract: Systems and methods for designing integrated circuits and for creating and using androgynous interfaces between electronic components of integrated circuits are disclosed. One preferred method of designing an integrated circuit includes several steps. In one step, a foundation block for the integrated circuit is specified, including specifying the locations of multiple androgynous interfaces in the integrated circuit. In another step, one or more component blocks to comprise the integrated circuit are identified for use. In another step, the component blocks to form a layout of the integrated circuit are positioned in a manner that minimizes connection distances between functional blocks and between functional blocks and the androgynous interfaces. In another step, the androgynous interfaces are set to perform as targets (slaves) or initiators (masters) based on the layout.