Abstract: An imaging device may include an image sensor that generates frames of image data in response to incident light with an array of image pixels, and processing circuitry that processes the image data. The processing circuitry may include a transformation circuit that applies transforms to subsampled frames of image data that are generated using a subset of the image pixels to produce transform values, and a comparator circuit that compares the transform values. The processing circuitry may determine that motion has occurred between sequential frames if a difference between a first transform value corresponding to a first image frame and a second transform value corresponding to a second image frame exceeds a threshold value. In response to determining that motion has occurred, the image sensor may generate full-frame image data using all of the pixels of the array of image pixels.

Abstract: Image sensor systems are disclosed that allow for charge transfer between pixels of a group included in a pixel array with a single digital readout of the accumulated charge from the group. Each of the pixels within a given group includes a photodetector. One or more pump gates are arranged between adjacent pixels of the given group to allow charge to be pumped from one pixel to the next in a serial fashion within the group. A readout circuit that includes at least a transfer gate and a capacitor may be coupled to a final pixel of the group to receive the accumulated charge and generate a photodetector signal (based on the accumulated charge) that can be amplified via a source follower component and ultimately read out to a column amplifier.

Abstract: Examples include an image sensor comprising a pixel array having at least one column of addressable pixel sensors, and a column amplifier coupled to the at least one column of addressable pixel sensors, the column amplifier comprising a transistor bank including a plurality of transistors, and mode select circuitry coupled to the transistor bank and configured to establish one or more connections among the plurality of transistors to configure the column amplifier to operate in one of a differential mode of operation and a single-ended mode of operation.

Abstract: Structures are disclosed for a binned set of two or more pixels of a pixel array that share a same readout circuit. The binned pixel design provides space-saving benefits on the chip and also improves the overall image quality. According to some embodiments, each of the binned pixels includes a photodetector and its own transfer gate. The readout circuit is coupled to the transfer gates of each of the binned pixels and includes its own second transfer gate that separates the pixels from a gain mode select block. The gain mode select block may include capacitors of different sizes and one or more switches to control which capacitors are to receive the charge from any one of the binned pixels. The readout circuit may also include a potential barrier (such as a diode), which allows for pumping charge onto the one or more capacitors of the gain mode select block.

Abstract: Image sensor systems are disclosed that include charge coupled device (CCD) pixels integrated with CMOS readout circuitry via separately bonded substrates. According to some embodiments, columns of image sensing pixels on a first substrate are arranged with overlapping gate structures to facilitate charge transfer between the pixels. At least one pixel is coupled to a first conductive pad that contacts (or is melded with) a second conductive pad from a second substrate bonded to the first substrate. The second substrate includes a readout circuit using one or more CMOS devices coupled to the second conductive pad to receive the accumulated charge from a given column of pixels. The resulting photodetector signal from the accumulated charge can be, for instance, amplified via a source follower component and ultimately read out to a column amplifier, and subjected to further processing and/or use in a given downstream system.

Abstract: Examples include column readout amplifiers and image sensors including same. In one example, a column readout amplifier includes a signal amplifier having an amplifier output and first and second amplifier inputs, a filter capacitor having first and second terminals, the second terminal connected to a ground terminal, a buffer amplifier having a buffer amplifier input and a buffer amplifier output, a switching network configured to switchably connect the amplifier output to the buffer amplifier input and the buffer amplifier output to the first terminal of the filter capacitor during a first time period, and to switchably connect the amplifier output directly to the first terminal of the filter capacitor during a second time period, and a low-pass filter connected in a feedback path of the signal amplifier between the amplifier output and the first amplifier input, the low-pass filter including a series resistor and a capacitor.

Abstract: Image sensor systems are disclosed that include charge coupled device (CCD) pixels integrated with CMOS readout circuitry via separately bonded substrates. According to some embodiments, columns of image sensing pixels on a first substrate are arranged with overlapping gate structures to facilitate charge transfer between the pixels. At least one pixel is coupled to a first conductive pad that contacts (or is melded with) a second conductive pad from a second substrate bonded to the first substrate. The second substrate includes a readout circuit using one or more CMOS devices coupled to the second conductive pad to receive the accumulated charge from a given column of pixels. The resulting photodetector signal from the accumulated charge can be, for instance, amplified via a source follower component and ultimately read out to a column amplifier, and subjected to further processing and/or use in a given downstream system.

Abstract: Examples include column readout amplifiers and image sensors including same. In one example, a column readout amplifier includes a signal amplifier having an amplifier output and first and second amplifier inputs, a filter capacitor having first and second terminals, the second terminal connected to a ground terminal, a buffer amplifier having a buffer amplifier input and a buffer amplifier output, a switching network configured to switchably connect the amplifier output to the buffer amplifier input and the buffer amplifier output to the first terminal of the filter capacitor during a first time period, and to switchably connect the amplifier output directly to the first terminal of the filter capacitor during a second time period, and a low-pass filter connected in a feedback path of the signal amplifier between the amplifier output and the first amplifier input, the low-pass filter including a series resistor and a capacitor.

Abstract: Examples include an image sensor comprising a pixel array having at least one column of addressable pixel sensors, and a column amplifier coupled to the at least one column of addressable pixel sensors, the column amplifier comprising a transistor bank including a plurality of transistors, and mode select circuitry coupled to the transistor bank and configured to establish one or more connections among the plurality of transistors to configure the column amplifier to operate in one of a differential mode of operation and a single-ended mode of operation.

Abstract: Image sensor systems are disclosed that allow for charge transfer between pixels of a group included in a pixel array with a single digital readout of the accumulated charge from the group. Each of the pixels within a given group includes a photodetector. One or more pump gates are arranged between adjacent pixels of the given group to allow charge to be pumped from one pixel to the next in a serial fashion within the group. A readout circuit that includes at least a transfer gate and a capacitor may be coupled to a final pixel of the group to receive the accumulated charge and generate a photodetector signal (based on the accumulated charge) that can be amplified via a source follower component and ultimately read out to a column amplifier.

Abstract: Structures are disclosed for a binned set of two or more pixels of a pixel array that share a same readout circuit. The binned pixel design provides space-saving benefits on the chip and also improves the overall image quality. According to some embodiments, each of the binned pixels includes a photodetector and its own transfer gate. The readout circuit is coupled to the transfer gates of each of the binned pixels and includes its own second transfer gate that separates the pixels from a gain mode select block. The gain mode select block may include capacitors of different sizes and one or more switches to control which capacitors are to receive the charge from any one of the binned pixels. The readout circuit may also include a potential barrier (such as a diode), which allows for pumping charge onto the one or more capacitors of the gain mode select block.

Abstract: A given pixel of a pixel array includes various operation modes with each of the operation modes having a different conversion gain for the charge received from the photodetector of the pixel. When the modes are used in conjunction with one another, the dynamic range of the pixel can be increased. A readout circuit coupled to a photodetector within a given pixel includes a transfer gate between the photodetector and a gain mode select block that includes capacitors of different sizes and one or more switches to control which capacitors are to receive the charge from the photodetector. Depending on the state(s) of the one or more switches, different operation modes with different conversion gains can be selected to increase the dynamic range of the pixel. The adaptability of the readout circuit can allow for a high dynamic range even in extreme temperature environments by lowering the dark current.

Abstract: A given pixel of a pixel array includes various operation modes with each of the operation modes having a different conversion gain for the charge received from the photodetector of the pixel. When the modes are used in conjunction with one another, the dynamic range of the pixel can be increased. A readout circuit coupled to a photodetector within a given pixel includes a transfer gate between the photodetector and a gain mode select block that includes capacitors of different sizes and one or more switches to control which capacitors are to receive the charge from the photodetector. Depending on the state(s) of the one or more switches, different operation modes with different conversion gains can be selected to increase the dynamic range of the pixel. The adaptability of the readout circuit can allow for a high dynamic range even in extreme temperature environments by lowering the dark current.

Abstract: An imaging device may include an image sensor that generates frames of image data in response to incident light with an array of image pixels, and processing circuitry that processes the image data. The processing circuitry may include a transformation circuit that applies transforms to subsampled frames of image data that are generated using a subset of the image pixels to produce transform values, and a comparator circuit that compares the transform values. The processing circuitry may determine that motion has occurred between sequential frames if a difference between a first transform value corresponding to a first image frame and a second transform value corresponding to a second image frame exceeds a threshold value. In response to determining that motion has occurred, the image sensor may generate full-frame image data using all of the pixels of the array of image pixels.

Abstract: An imaging device may include an image sensor that generates frames of image data in response to incident light with an array of image pixels, and processing circuitry that processes the image data. The processing circuitry may include a transformation circuit that applies transforms to subsampled frames of image data that are generated using a subset of the image pixels to produce transform values, and a comparator circuit that compares the transform values. The processing circuitry may determine that motion has occurred between sequential frames if a difference between a first transform value corresponding to a first image frame and a second transform value corresponding to a second image frame exceeds a threshold value. In response to determining that motion has occurred, the image sensor may generate full-frame image data using all of the pixels of the array of image pixels.

Abstract: An imaging device may include an image sensor that generates frames of image data in response to incident light with an array of image pixels, and processing circuitry that processes the image data. The processing circuitry may include a transformation circuit that applies transforms to subsampled frames of image data that are generated using a subset of the image pixels to produce transform values, and a comparator circuit that compares the transform values. The processing circuitry may determine that motion has occurred between sequential frames if a difference between a first transform value corresponding to a first image frame and a second transform value corresponding to a second image frame exceeds a threshold value. In response to determining that motion has occurred, the image sensor may generate full-frame image data using all of the pixels of the array of image pixels.

Abstract: Systems and methods for designing integrated circuits and for creating and using androgynous interfaces between electronic components of integrated circuits are disclosed. One preferred method of designing an integrated circuit includes several steps. In one step, a foundation block for the integrated circuit is specified, including specifying the locations of multiple androgynous interfaces in the integrated circuit. In another step, one or more component blocks to comprise the integrated circuit are identified for use. In another step, the component blocks to form a layout of the integrated circuit are positioned in a manner that minimizes connection distances between functional blocks and between functional blocks and the androgynous interfaces. In another step, the androgynous interfaces are set to perform as targets (slaves) or initiators (masters) based on the layout.

Abstract: Systems and methods for designing integrated circuits and for creating and using androgynous interfaces between electronic components of integrated circuits are disclosed. One preferred method of designing an integrated circuit includes several steps. In one step, a foundation block for the integrated circuit is specified, including specifying the locations of multiple androgynous interfaces in the integrated circuit. In another step, one or more component blocks to comprise the integrated circuit are identified for use. In another step, the component blocks to form a layout of the integrated circuit are positioned in a manner that minimizes connection distances between functional blocks and between functional blocks and the androgynous interfaces. In another step, the androgynous interfaces are set to perform as targets (slaves) or initiators (masters) based on the layout.

Abstract: Systems and methods for designing integrated circuits and for creating and using androgynous interfaces between electronic components of integrated circuits are disclosed. One preferred method of designing an integrated circuit includes several steps. In one step, a foundation block for the integrated circuit is specified, including specifying the locations of multiple androgynous interfaces in the integrated circuit. In another step, one or more component blocks to comprise the integrated circuit are identified for use. In another step, the component blocks to form a layout of the integrated circuit are positioned in a manner that minimizes connection distances between functional blocks and between functional blocks and the androgynous interfaces. In another step, the androgynous interfaces are set to perform as targets (slaves) or initiators (masters) based on the layout.

Abstract: Systems and methods for designing integrated circuits and for creating and using androgynous interfaces between electronic components of integrated circuits are disclosed. One preferred method of designing an integrated circuit includes several steps. In one step, a foundation block for the integrated circuit is specified, including specifying the locations of multiple androgynous interfaces in the integrated circuit. In another step, one or more component blocks to comprise the integrated circuit are identified for use. In another step, the component blocks to form a layout of the integrated circuit are positioned in a manner that minimizes connection distances between functional blocks and between functional blocks and the androgynous interfaces. In another step, the androgynous interfaces are set to perform as targets (slaves) or initiators (masters) based on the layout.