Patents by Inventor Alexander Marchenko

Alexander Marchenko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240152956
    Abstract: A method and device, in an embodiment, are operable or usable to execute a plurality of computer-readable instructions after a start of a publication period of an advertising campaign. The advertising campaign includes a publication schedule related to an ad, and the publication schedule includes at least one publication slot. The advertising campaign specifies a plurality of publications of the ad according to the publication schedule. The computer-readable instructions are configured to direct one or more processors to perform a plurality of steps during the publication period. The steps include performing an audience assessment step at different times. Each of the audience assessment steps includes the processing of data stored in a data source. Each of the audience assessment steps results in an audience level that has been assessed for at least one of the publications that has been published.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 9, 2024
    Applicant: Active Media Services, Inc. d/b/a Active International
    Inventors: Alexander Sapoznikov, Vladyslav Marchenko, James T. Ou
  • Patent number: 11972456
    Abstract: A device and method, as disclosed herein, are operable to receive reference data during an in-process period that occurs while an advertising campaign is implemented based on purchase data. The reference data includes first reference data arranged in accordance with a first data organization. The reference data also includes second reference data arranged in accordance with a second data organization that differs from the first data organization. The purchase data includes an actual rate related to one or more ad placements. During the in-process period, with respect to the at least one ad placements, the device and method are operable to determine a plurality of metrics related to the one or more ad placement. The metrics depend at least partially on the reference data. Also, during the in-process period, the device and method are operable to determine a target rate related to the one or more ad placements. The target rate depends at least partially on a plurality of the metrics.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: April 30, 2024
    Assignee: Active Media Services, Inc.
    Inventors: Alexander Sapoznikov, Vladyslav Marchenko, James T. Ou
  • Publication number: 20070143716
    Abstract: A critical path minimization technique uses a novel reshaping layout reorganization mechanism. Circuit objects and/or object fragments which belong to a critical path in a reference direction are reshaped using resources of an orthogonal direction. A fragment may decrease its size in the layout in the reference direction and increase its size in the orthogonal direction. Types of reshaping include via, diode or tie reshaping, transistor chain reshaping by transistor finger resizing, and transistor chain reshaping by transistor finger removing. The removal technique can include removal of one (or 2N+1) transistor finger(s) from an edge (e.g., beginning or end) of a transistor chain, removal of two (or 2N) adjacent transistor fingers from any position of a transistor chain, removal of one (or 2N+1) transistor finger(s) from inside a transistor chain with diffusion gap insertion, and removal of a group or series of transistor fingers.
    Type: Application
    Filed: December 29, 2003
    Publication date: June 21, 2007
    Inventors: Robert Maziasz, Alexander Marchenko, Mikhail Sotnikov, Igor Topuzov
  • Patent number: 6477692
    Abstract: The invention concerns a method for manufacturing an electronic device having a channel. The channel has a number of rows and columns for wiring of nets. Usually each wiring layer is dedicated to either the rows or the columns. According to this method certain row segments can be shifted from one wiring layer to another, so that the channel area is used more effectively.
    Type: Grant
    Filed: July 22, 1999
    Date of Patent: November 5, 2002
    Assignee: Motorola, Inc.
    Inventors: Alexander Marchenko, Andrey P. Plis, Eugene G. Shiro, Mikhail A. Sotnikov, Igor Topouzov, Patrick McGuiness
  • Patent number: 6477693
    Abstract: The invention relates to a method for manufacturing of electronic devices, such as very large scale integrated devices, having a channel. The channel routing is done based on a compositional approach in which initially all individual terminals are represented by individual nodes in a terminal vertical constraint graph. Individual constraints between individual terminals are represented by separate edges. This approach allows the resolution of difficult classes of routing problems in an efficient way.
    Type: Grant
    Filed: March 6, 2000
    Date of Patent: November 5, 2002
    Assignee: Motorola, Inc.
    Inventors: Alexander Marchenko, Andrey Plis, Gopal Vijayan
  • Patent number: 6434721
    Abstract: The present layout compaction technique compacts circuit elements in two dimensions of a circuit layout with reduced computational requirements. A circuit layout representation is converted to a constraint graph representation in a reference direction. An orthogonal constraint graph is also constructed. A critical path subgraph is constructed based upon the reference and orthogonal constraint graphs, where one or more critical paths are chosen as the longest paths between the source and sink vertices of the reference constraint graph. Further, each vertex in the constraint graph is converted to an input vertex for each incoming shear edge and an output vertex for each outgoing shear edge. Jogging edges are created between each input and output vertices in the critical path subgraph. Weight values are assigned to each shear and jogging edge.
    Type: Grant
    Filed: April 3, 2000
    Date of Patent: August 13, 2002
    Assignee: Motorola, Inc.
    Inventors: Venkata K. R. Chiluvuri, Alexander Marchenko, Mikhail Sotnikov
  • Patent number: 6412103
    Abstract: In an improved routing method vertical constraint graph is generated in which a critical node is selected. The critical node is expanded to contain corresponding terminals. The resulting subnodes within the critical node are interconnected by edges that are representative of vertical constraints. A graph coloring method is employed to split the critical node into a number of new nodes. Thereby it is possible to route channels having multi-dimensional vertical constrains.
    Type: Grant
    Filed: July 22, 1999
    Date of Patent: June 25, 2002
    Assignee: Motorola Inc.
    Inventors: Alexander Marchenko, Andrey P. Plis, Vijayan Gopalakrishnan