Patents by Inventor Alexander Ned

Alexander Ned has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10605685
    Abstract: Certain implementations of the disclosed technology include systems and methods for providing header assemblies for use with pressure sensors in high-temperature environments. Certain example implementations include a header assembly. The header assembly can include a header portion having a first side and a second side, the header portion including one or more bores extending through the header portion from the first side to the second side. In certain example implementations, one or more platinum header pins are disposed within and extending through the one or more bores of the header portion. In certain example implementations, the header assembly can include one or more brazing portions corresponding to the one or more platinum header pins. In certain example implementations, the platinum header pins are configured for electrical communication with corresponding electrodes of a leadless transducer element.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: March 31, 2020
    Assignee: Kulite Semiconductor Products, Inc.
    Inventors: Alexander Ned, Sorin Stefanescu, Scott Goodman
  • Publication number: 20190033155
    Abstract: Certain implementations of the disclosed technology include systems and methods for providing header assemblies for use with pressure sensors in high-temperature environments. Certain example implementations include a header assembly. The header assembly can include a header portion having a first side and a second side, the header portion including one or more bores extending through the header portion from the first side to the second side. In certain example implementations, one or more platinum header pins are disposed within and extending through the one or more bores of the header portion. In certain example implementations, the header assembly can include one or more brazing portions corresponding to the one or more platinum header pins. In certain example implementations, the platinum header pins are configured for electrical communication with corresponding electrodes of a leadless transducer element.
    Type: Application
    Filed: October 3, 2018
    Publication date: January 31, 2019
    Inventors: Alexander Ned, Sorin Stefanescu, Scott Goodman
  • Patent number: 10119877
    Abstract: Certain implementations of the disclosed technology include systems and methods for providing header assemblies for use with pressure sensors in high-temperature environments. Certain example implementations include a header assembly. The header assembly can include a header portion having a first side and a second side, the header portion including one or more bores extending through the header portion from the first side to the second side. In certain example implementations, one or more platinum header pins are disposed within and extending through the one or more bores of the header portion. In certain example implementations, the header assembly can include one or more brazing portions corresponding to the one or more platinum header pins. In certain example implementations, the platinum header pins are configured for electrical communication with corresponding electrodes of a leadless transducer element.
    Type: Grant
    Filed: July 15, 2016
    Date of Patent: November 6, 2018
    Assignee: Kulite Semiconductor Products, Inc.
    Inventors: Alexander Ned, Sorin Stefanescu, Scott Goodman
  • Publication number: 20170016791
    Abstract: Certain implementations of the disclosed technology include systems and methods for providing header assemblies for use with pressure sensors in high-temperature environments. Certain example implementations include a header assembly. The header assembly can include a header portion having a first side and a second side, the header portion including one or more bores extending through the header portion from the first side to the second side. In certain example implementations, one or more platinum header pins are disposed within and extending through the one or more bores of the header portion. In certain example implementations, the header assembly can include one or more brazing portions corresponding to the one or more platinum header pins. In certain example implementations, the platinum header pins are configured for electrical communication with corresponding electrodes of a leadless transducer element.
    Type: Application
    Filed: July 15, 2016
    Publication date: January 19, 2017
    Inventors: Alexander Ned, Sorin Stefanescu, Scott Goodman
  • Publication number: 20140273399
    Abstract: A method for fabricating silicon-on-insulator (SOI) semiconductor devices, wherein the piezoresistive pattern is defined within a blanket doped layer after fusion bonding. This new method of fabricating SOI semiconductor devices is more suitable for simpler large scale fabrication as it provides the flexibility to select the device pattern/type at the latest stages of fabrication.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Applicant: KULITE SEMICONDUCTOR PRODUCTS, INC.
    Inventors: ALEXANDER NED, SORIN STEFANESCU, JOE VANDEWEERT
  • Patent number: 8656784
    Abstract: An enclosed, flat covered leadless pressure sensor assembly suitable for extreme environment operation including dynamic, ultra-high temperature heating, light and heat flash, and high-speed, flow-related environments. The pressure sensor assembly comprises a substrate comprising a micromachined sensing diaphragm defined on a first side. A cover is attached to the first side of the substrate such that it covers at least the sensing diaphragm. The top surface of the cover is substantially flat, thereby promoting uniformity in the distribution of stress and thermal effects across a top surface of the cover.
    Type: Grant
    Filed: August 19, 2011
    Date of Patent: February 25, 2014
    Assignee: Kulite Semiconductor Products, Inc.
    Inventors: Alexander Ned, Leo Geras, Joseph Van de Weert
  • Patent number: 8631707
    Abstract: A dual diaphragm pressure transducer, or sensor, with compensation for non-pressure effects is disclosed. The pressure sensor can include two pressure transducers located on separate portions of a chip. The first pressure transducer can be a differential pressure transducer, which produces a signal proportional to one or more applied pressures and includes other non-pressure effects. The second pressure transducer can be sealed in a hermetic chamber and thus can produce a signal proportional only to non-pressure effects. The signals can be combined to produce a signal proportional to the applied pressures with no non-pressure effects. The first and second pressure transducers can be physically and/or electrically isolated to improve sealing between the two pressure transducers and prevent pressure leaks therebetween.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: January 21, 2014
    Assignee: Kulite Semiconductor Products, Inc.
    Inventors: Anthony D. Kurtz, Alexander Ned, Sorin Stefanescu, Nora Kurtz
  • Patent number: 8497759
    Abstract: The RTD device of the present invention is comprised of a semiconductor substrate and a substantially thin conductive metal layer disposed upon the semiconductor substrate, wherein the conductive metal has a substantially linear temperature-resistance relationship. The conductive layer is etched into a convoluted RTD pattern, which consequently increases the overall resistance and minimizes the overall mass of the RTD assembly. A contact glass cover and a conductive metal-glass frit are placed over the RTD assembly to hermetically seal the RTD. The resultant structure can be “upside-down” mounted onto a header or a flat shim so that the bottom surface of the semiconductor substrate is exposed to the external environment, thus shielding the RTD from external forces. The resultant structure is a low mass, highly conductive, leadless, and hermetically sealed RTD that accurately measures the temperature of liquids and gases and maintains fast response time in high temperatures and harsh environments.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: July 30, 2013
    Assignee: Kulite Semiconductor Products, Inc.
    Inventors: Alexander Ned, Vikram Patil, Joseph VanDeWeert, Nora Kurtz
  • Patent number: 8497757
    Abstract: A piezoresistive sensor device and a method for making a piezoresistive device are disclosed. The sensor device comprises a silicon wafer having piezoresistive elements and contacts in electrical communication with the elements. The sensor device further comprises a contact glass coupled to the silicon wafer and having apertures aligned with the contacts. The sensor device also comprises a non-conductive frit for mounting the contact glass to a header glass, and a conductive non-lead glass frit disposed in the apertures and in electrical communication with the contacts. The method for making a piezoresistive sensor device, comprises bonding a contact glass to a silicon wafer such that apertures in the glass line up with contacts on the wafer, and filling the apertures with a non-lead glass frit such that the frit is in electrical communication with the contacts.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: July 30, 2013
    Assignee: Kulite Semiconductor Products, Inc.
    Inventors: Anthony D. Kurtz, Alexander Ned
  • Publication number: 20130042694
    Abstract: An enclosed, flat covered leadless pressure sensor assembly suitable for extreme environment operation including dynamic, ultra-high temperature heating, light and heat flash, and high-speed, flow-related environments. The pressure sensor assembly comprises a substrate comprising a micromachined sensing diaphragm defined on a first side. A cover is attached to the first side of the substrate such that it covers at least the sensing diaphragm. The top surface of the cover is substantially flat, thereby promoting uniformity in the distribution of stress and thermal effects across a top surface of the cover.
    Type: Application
    Filed: August 19, 2011
    Publication date: February 21, 2013
    Applicant: Kulite Semiconductor Products, Inc.
    Inventors: ALEXANDER NED, Leo Geras, Joseph VanDeWeert
  • Patent number: 7874216
    Abstract: There is disclosed a method and apparatus for mounting a leadless semiconductor chip on a header. The semiconductor chip has contacts on a surface and the chip is of a specified geometric shape. The header has a contact surface for receiving the chip with the contact surface of the header containing header contact pins, which pins have to contact the contacts on the semiconductor chip. The header has a guide pin extending from the contact surface and there is a guide plate which has an aperture adapted to be placed over the guide pin, the guide plate further has a chip accommodating aperture of the same geometric shape as the chip. The guide plate, when placed over the guide pin enables the chip to be placed in the chip accommodating aperture so that the contacts of the header pin are properly and accurately aligned with respect to the contacts on the semiconductor chip.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: January 25, 2011
    Assignee: Kulite Semiconductor Products, Inc.
    Inventors: Anthony D. Kurtz, Alexander Ned, Scott Goodman
  • Publication number: 20090313797
    Abstract: There is disclosed a method and apparatus for mounting a leadless semiconductor chip on a header. The semiconductor chip has contacts on a surface and the chip is of a specified geometric shape. The header has a contact surface for receiving the chip with the contact surface of the header containing header contact pins, which pins have to contact the contacts on the semiconductor chip. The header has a guide pin extending from the contact surface and there is a guide plate which has an aperture adapted to be placed over the guide pin, the guide plate further has a chip accommodating aperture of the same geometric shape as the chip. The guide plate, when placed over the guide pin enables the chip to be placed in the chip accommodating aperture so that the contacts of the header pin are properly and accurately aligned with respect to the contacts on the semiconductor chip.
    Type: Application
    Filed: October 20, 2008
    Publication date: December 24, 2009
    Applicant: Kulite Semiconductor Products, Inc.
    Inventors: Anthony D. Kurtz, Alexander Ned, Scott Goodman
  • Publication number: 20080028863
    Abstract: A high temperature pressure sensing system (transducer) including: a pressure sensing piezoresistive sensor formed by a silicon-on-insulator (SOI) process; a SOI amplifier circuit operatively coupled to the piezoresistive sensor; a SOI gain controller circuit including a plurality of resistances that when selectively coupled to the amplifier adjust a gain of the amplifier; a plurality of off-chip contacts corresponding to the resistances, respectively, for electrically activating the corresponding resistances and using a metallization layer for the SOI sensor and SOI ASIC suitable for high temperature interconnections (bonding); wherein the piezoresistive sensor, amplifier circuit and gain control circuit are suitable for use in environments having a temperature greater than 175 degrees C. and reaching between 250° C. and 300° C., and wherein the entire transducer has a high immunity to nuclear radiation.
    Type: Application
    Filed: February 22, 2007
    Publication date: February 7, 2008
    Inventors: Anthony Kurtz, Wolf Landmann, Alexander Ned
  • Publication number: 20070254796
    Abstract: A method to prevent the catastrophic failure of electrical contacts of silicon piezoresistive transducers located on a silicon wafer at temperatures above 600° C. comprising the steps of using a lead-free glass frit to surround the contacts and bonding the sensor wafer to a glass wafer employing a lead-free glass and utilizing a modified electrostatic bonding technique to join the silicon wafer to the lead-free glass wafer to form a high temperature SOI device.
    Type: Application
    Filed: April 26, 2006
    Publication date: November 1, 2007
    Inventors: Anthony Kurtz, Alexander Ned
  • Publication number: 20070157735
    Abstract: A semiconductor chip for use in fabricating pressure transducers, including: a semiconductor wafer having a top and a bottom surface, a layer of an insulating material formed on the top surface, the bottom surface having at least two recesses of substantially equal dimensions and spaced apart, the recesses providing first and second substantially equal thin active areas, which areas deflect upon application to a force applied to the top surface, a first plurality of piezoresistive devices arranged in a given pattern and positioned on the insulating material and located within the first area, a second equal plurality of piezoresistive devices arranged in the identical pattern and located on the insulating material within the second active area, first connecting means for connecting the first plurality of piezoresistive devices in a first array, second connecting means for connecting the second plurality of piezoresistive devices in a second array corresponding to the first array.
    Type: Application
    Filed: March 9, 2007
    Publication date: July 12, 2007
    Inventors: Anthony Kurtz, Alexander Ned
  • Publication number: 20070114624
    Abstract: A differential pressure sensor has a semiconductor wafer having a top and bottom surface. The top surface of the wafer has a central active area containing piezoresistive elements. These elements are passivated and covered with a layer of silicon dioxide. Each element has a contact terminal associated therewith. The semiconductor wafer has an outer peripheral silicon frame surrounding the active area. The semiconductor wafer is bonded to a glass cover member via an anodic or electrostatic bond by bonding the outer peripheral frame to the periphery of the glass wafer. An inner silicon dioxide frame forms a compression bond with the glass wafer when the glass wafer is bonded to the silicon frame. This compression bond prevents deleterious fluids from entering the active area or destroying the silicon. The above described apparatus is mounted on a header such that through holes in the glass wafer are aligned with the header terminals.
    Type: Application
    Filed: January 10, 2007
    Publication date: May 24, 2007
    Inventors: Anthony Kurtz, Alexander Ned
  • Publication number: 20070099392
    Abstract: A method of fabricating a semiconductor-on-insulator device including: providing a first semiconductor wafer having an about 200 angstrom thick oxide layer thereover; etching the first semiconductor wafer to raise a pattern therein; doping the raised pattern of the first semiconductor wafer through the about 200 angstrom thick oxide layer; providing a second semiconductor wafer having an oxide thereover; and, bonding the first semiconductor wafer oxide to the second semiconductor wafer oxide at an elevated temperature.
    Type: Application
    Filed: October 28, 2005
    Publication date: May 3, 2007
    Inventors: Anthony Kurtz, Alexander Ned
  • Publication number: 20070089526
    Abstract: A semiconductor chip for use in fabricating pressure transducers, including: a semiconductor wafer having a top and a bottom surface, a layer of an insulating material formed on the top surface, the bottom surface having at least two recesses of substantially equal dimensions and spaced apart, the recesses providing first and second substantially equal thin active areas, which areas deflect upon application to a force applied to the top surface, a first plurality of piezoresistive devices arranged in a given pattern and positioned on the insulating material and located within the first area, a second equal plurality of piezoresistive devices arranged in the identical pattern and located on the insulating material within the second active area, first connecting means for connecting the first plurality of piezoresistive devices in a first array, second connecting means for connecting the second plurality of piezoresistive devices in a second array corresponding to the first array.
    Type: Application
    Filed: October 26, 2005
    Publication date: April 26, 2007
    Inventors: Anthony Kurtz, Alexander Ned
  • Publication number: 20070068267
    Abstract: A high temperature pressure sensing system (transducer) including: a pressure sensing piezoresistive sensor formed by a silicon-on-insulator (SOI) process; a SOI amplifier circuit operatively coupled to the piezoresistive sensor; a SOI gain controller circuit including a plurality of resistances that when selectively coupled to the amplifier adjust a gain of the amplifier; a plurality of off-chip contacts corresponding to the resistances, respectively, for electrically activating the corresponding resistances and using a metallization layer for the SOI sensor and SOI ASIC suitable for high temperature interconnections (bonding); wherein the piezoresistive sensor, amplifier circuit and gain control circuit are suitable for use in environments having a temperature greater than 175 degrees C. and reaching between 250° C. and 300° C., and wherein the entire transducer has a high immunity to nuclear radiation.
    Type: Application
    Filed: September 23, 2005
    Publication date: March 29, 2007
    Inventors: Anthony Kurtz, Wolf Landmann, Alexander Ned
  • Publication number: 20070039391
    Abstract: An ultra high temperature hermetically protected transducer includes a sensor chip having an active area upon which is deposited piezoresistive sensing elements. The elements are located on the top surface of the silicon wafer chip and have leads and terminals extending from the active area of the chip. The active area is surrounded with an extending rim or frame. The active area is coated with an oxide layer which passivates the piezoresistive sensing network. The chip is then attached to a glass pedestal, which is larger in size than the sensor chip. The glass pedestal has a through hole or aperture at each corner. The entire composite structure is then mounted onto a high temperature header with the metallized regions of the header being exposed to the holes in the glass pedestal; a high temperature lead is then bonded directly to the metallized contact area of the sensor chip at one end. The leads are of sufficient length to extend into the through holes in the glass pedestal.
    Type: Application
    Filed: October 24, 2006
    Publication date: February 22, 2007
    Inventors: Anthony Kurtz, Alexander Ned