Abstract: A multi-port register file suitable for use in a reservation station in a superscalar microprocessor. The multi-port register is a static random access memory (SRAM) array which interleaves the data bits of the reservation station entries in a pair of storage cells. Because data may be associatively written to multiple entries within the SRAM cell array, a capacitance isolation mechanism including a plurality of inverters may be provided in data lines, such as writeback data lines, of the array. The isolation mechanism is situated so as to be shared by two interleaved cells within the SRAM array. The storage cells within the reservation station register may include at least one read port and a plurality of write or writeback ports coupled to a plurality of read enable and write enable lines. In one embodiment, cells of the SRAM array are exclusively read and thus a reduced sized sampling transistor may be used for the read ports.

Abstract: A method and apparatus for recovering the state of a speculatively scheduled operation in a processor which cannot be executed at the speculated time allows components within the processor to begin the steps of dispatch and execution of operations based on the speculated return of data for the operations at a predetermined time. After these steps have begun for an operation, a signal is received by one or more of these components if the operation cannot be completed at the speculated time. If the operation cannot be completed at the speculated time then the operation is canceled, recovering the state of the operation prior to the beginning of the steps of dispatch and execution.

Abstract: A reservation station includes a memory array in which micro-operations are stored at entry locations with an age representing a temporal ordering. Control circuitry resets the age of a new micro-operation, and increments the ages of previously stored micro-operations, when an entry is written into the array. Wired-OR circuitry is utilized to find the oldest age within the memory array, which is then broadcast through the array to generate a priority pointer that identifies a group of entries which contain an entry with the oldest age. Scheduling logic selects a ready entry in the group for dispatch to a port of the execution unit.