Patents by Inventor Alexander R. Gurga

Alexander R. Gurga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11848349
    Abstract: A method of forming a curved semiconductor includes: forming a device layer on a semiconductor substrate; forming a metal layer on the device layer; removing the semiconductor substrate from the device layer; and curving the device layer and the metal layer.
    Type: Grant
    Filed: April 19, 2019
    Date of Patent: December 19, 2023
    Assignee: HRL LABORATORIES, LLC
    Inventors: Andrew C. Keefe, Geoffrey P. McKnight, Alexander R. Gurga, Ryan Freeman
  • Patent number: 10998372
    Abstract: A method of manufacturing a hybrid focal-plane array includes: forming a read-out integrated circuit with integral bending slit; forming a detector die separately from the read-out integrated circuit and including a detector with integral bending slit; and joining the read-out integrated circuit and the detector die to each other such that the read-out bending slit and the detector bending slit are aligned with each other.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: May 4, 2021
    Assignee: HRL Laboratories, LLC
    Inventors: Geoffrey P. McKnight, Andrew C. Keefe, Alexander R. Gurga, Ryan Freeman
  • Patent number: 10748957
    Abstract: A method of manufacturing a curved semiconductor die includes: designing a semiconductor die design by conducting finite element analysis of an initial semiconductor die design having a partial spherical curvature, the initial semiconductor die design including a shape of a semiconductor die and a location and shape of a slit in the semiconductor die; when a size of a gap at the slit in the curved semiconductor die is outside a tolerance, modifying the initial semiconductor die design to provide a revised semiconductor die design and conducting another finite element analysis thereof; when the size of the gap at the slit in the curved semiconductor die is within the tolerance, manufacturing a microfabrication mask utilizing the initial semiconductor die design or the revised semiconductor die design having the size of the gap within the tolerance; forming a semiconductor die by utilizing the microfabrication mask; and curving the semiconductor die.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: August 18, 2020
    Assignee: HRL Laboratories, LLC
    Inventors: Geoffrey P. McKnight, Andrew C. Keefe, Alexander R. Gurga, Ryan Freeman