Patents by Inventor Alexander R. Marquardt

Alexander R. Marquardt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Routing architecture for a programmable logic device
    Patent number: 6970014
    Abstract: An embodiment of this invention pertains to a 3-sided routing architecture to interconnect function blocks, such as logic array blocks (“LABs”), within a programmable logic device (“PLD”). In the 3-sided routing architecture, inputs and outputs on a first side of a function block connect to a first channel, and inputs and outputs on a second side of the function block connect to a second channel where the second side is opposite the first side. Inputs and outputs on a third side of the function block connect to a third channel. A fourth channel associated with a fourth side of the function block, the fourth side opposite the third side, is coupled only to the first channel and the second channel. In one configuration, the inputs and outputs on each of the first side, the second side, and the third side have an equal number of inputs and outputs. In this configuration, each of the first channel, the second channel, and the third channel have the same width.
    Type: Grant
    Filed: July 21, 2003
    Date of Patent: November 29, 2005
    Assignee: Altera Corporation
    Inventors: David M. Lewis, Paul Leventis, Andy L. Lee, Brian D. Johnson, Richard Cliff, Srinivas T. Reddy, Christopher F. Lane, Cameron R. McClintock, Vaughn Betz, Chris Wysocki, Alexander R. Marquardt
  • Routing architecture for a programmable logic device
    Patent number: 6630842
    Abstract: An embodiment of this invention pertains to a 3-sided routing architecture to interconnect function blocks, such as logic array blocks (“LABs”), within a programmable logic device (“PLD”). In the 3-sided routing architecture, inputs and outputs on a first side of a function block connect to a first channel, and inputs and outputs on a second side of the function block connect to a second channel where the second side is opposite the first side. Inputs and outputs on a third side of the function block connect to a third channel. A fourth channel associated with a fourth side of the function block, the fourth side opposite the third side, is coupled only to the first channel and the second channel. In one configuration, the inputs and outputs on each of the first side, the second side, and the third side have an equal number of inputs and outputs. In this configuration, each of the first channel, the second channel, and the third channel have the same width.
    Type: Grant
    Filed: May 6, 2002
    Date of Patent: October 7, 2003
    Assignee: Altera Corporation
    Inventors: David M. Lewis, Paul Leventis, Andy L. Lee, Brian D. Johnson, Richard Cliff, Srinivas T. Reddy, Christopher F. Lane, Cameron R. McClintock, Vaughn Betz, Chris Wysocki, Alexander R. Marquardt