Patents by Inventor Alexander R. Vogenthaler

Alexander R. Vogenthaler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7913217
    Abstract: Within a high level modeling system (HLMS), a method of visualizing a circuit design can include identifying the circuit design and reading hardware cost information for the circuit design. The method also can include presenting a graphical representation of the circuit design having at least one visual characteristic which can be varied according to the hardware cost information.
    Type: Grant
    Filed: September 18, 2008
    Date of Patent: March 22, 2011
    Assignee: Xilinx, Inc.
    Inventors: Alexander Carreira, Alexander R. Vogenthaler
  • Patent number: 7895564
    Abstract: A method of communicating data among a plurality of software modules of a heterogeneous software system can include constructing an XTable object in a first software module of the plurality of software modules and providing the XTable object to a second software module of the plurality of software modules. The method further can include extracting data from the XTable object within the second software module.
    Type: Grant
    Filed: November 8, 2005
    Date of Patent: February 22, 2011
    Assignee: Xilinx, Inc.
    Inventors: Jeffrey D. Stroomer, Roger B. Milne, Sean A. Kelly, Alexander R. Vogenthaler, Jonathan B. Ballagh
  • Patent number: 7669191
    Abstract: Implementing a type-safe heterogeneous containers in a memory arrangement of a computing system. In one embodiment, a main object of a class is specified in program source code. The class has a variant type, and the variant type provides at least two different data types, at least one of which is a linear array of objects of one of the data types. The class includes methods for putting and getting a variant object of the variant type in and from the main object. An application of a visitor method, which includes a respective operator for each of the different data types, is specified in the program source code for each method for getting a variant object from the main object. Compilation of the source code results in code that executes the one of the operators corresponding to the data type of a referenced variant object of the main object.
    Type: Grant
    Filed: June 14, 2005
    Date of Patent: February 23, 2010
    Assignee: Xilinx, Inc.
    Inventors: Sean A. Kelly, Roger B. Milne, Alexander R. Vogenthaler
  • Patent number: 7512890
    Abstract: A graphical user interface (GUI) is provided with a specifiable edit control field that is accessed in conjunction with a non-edit field, the non-edit field for example being a check box, or radio buttons. The specifiable edit field can be accessed for example by right clicking or double clicking on the non-edit field or overall GUI. The specifiable edit field allows changing parameters of the non-edit field via entry of a programmatic expression that evaluates to an valid input to the non-edit field. For example in a high-level modeling program that enables modeling modules of a Field Programmable Gate Array (FPGA), when a normal editing field can modify only one module at a time, the specifiable editing field can allow modifying a plurality of modules at one time that are hierarchically linked together by the associated non-edit field, such as a check box.
    Type: Grant
    Filed: July 25, 2005
    Date of Patent: March 31, 2009
    Assignee: Xilinx, Inc.
    Inventors: Alexander R. Vogenthaler, Roger B. Milne
  • Patent number: 7493578
    Abstract: Methods are provided for processing design information of an electronic circuit design. A single path or multiple paths that are produced by a first design tool are an input for the method. Each path includes an ordered set of element names of the electronic circuit design. Each element name of each path is pattern matched with the names of design blocks of the electronic circuit design produced by a second design tool. Data indicative of a path produced by the second design tool that includes the design blocks that are pattern matched to the ordered set of element names is the output of the method.
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: February 17, 2009
    Assignee: Xilinx, Inc.
    Inventors: Roger B. Milne, Alexander R. Vogenthaler, Jeffrey D. Stroomer, Bradley L. Taylor, Alexander Carreira
  • Patent number: 7444610
    Abstract: Within a high level modeling system (HLMS), a method of visualizing a circuit design can include identifying the circuit design and reading hardware cost information for the circuit design. The method also can include presenting a graphical representation of the circuit design having at least one visual characteristic which can be varied according to the hardware cost information.
    Type: Grant
    Filed: August 3, 2005
    Date of Patent: October 28, 2008
    Assignee: Xilinx, Inc.
    Inventors: Alexander Carreira, Alexander R. Vogenthaler
  • Patent number: 7363599
    Abstract: A first hierarchical identifier is efficiently matched with a particular hierarchical identifier from a set of second hierarchical identifiers of a design in a high level modeling system. The matching tolerates name changes and additional design details in the hierarchical identifiers. A first sub-identifier at each level of the first hierarchical identifier is pattern matched with each second sub-identifier at a corresponding level of at least one second hierarchical identifier in a respective first subset of the second hierarchical identifiers. The pattern matching may include determining an edit distance between the first and second sub-identifiers. For each of the levels, a respective second subset of the respective first subset is determined in response to the pattern matching. The particular hierarchical identifier is selected from an intersection of all of the second subsets. The particular hierarchical identifier of the design is displayed on a user interface of the high-level modeling system.
    Type: Grant
    Filed: October 4, 2005
    Date of Patent: April 22, 2008
    Assignee: Xilinx, Inc.
    Inventor: Alexander R. Vogenthaler