Patents by Inventor Alexander Roth

Alexander Roth has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12273805
    Abstract: A wireless communication system, including: a plurality of time variant transmission points for communicating with a user device, UE, wherein the UE is in a tracking region, wherein the UE is configured to receive and store a list including identifiers, IDs, of time variant transmission points for the tracking region, and wherein the list includes IDs of time variant transmission points which are available or visible for the UE in the one tracking region at different times or time periods.
    Type: Grant
    Filed: October 27, 2021
    Date of Patent: April 8, 2025
    Assignee: Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
    Inventors: Thi Uyen Ly Dang, Thomas Heyn, Alexander Hofmann, Elke Roth-Mandutz, Thomas Fehrenbach, Leszek Raschkowski
  • Publication number: 20250092146
    Abstract: Disclosed herein, in certain embodiments, are anti-hCCR8 antibodies, anti-hCCR8 antibody conjugates, and pharmaceutical compositions which comprise the anti-hCCR8 antibodies or conjugates. In some embodiments, also disclosed herein are methods of delivering a payload utilizing an anti-hCCR8 antibody described herein, and methods of treatment with use of an anti-hCCR8 antibody described herein.
    Type: Application
    Filed: April 26, 2024
    Publication date: March 20, 2025
    Inventors: Alexander Alexandrov, Karen Chiang, Le Li, Roberto Jappelli, Christopher Roth, Mauro Mileni, Michael Hanson
  • Patent number: 12235299
    Abstract: A measurement system includes an input port, a signal splitter, first and second signal paths, an analysis circuit, and a control circuit. The input port is configured to receive an input signal to be measured. The signal splitter is configured to split the input signal into a first signal that is forwarded to the first signal path and a second signal that is forwarded to the second signal path. The analysis circuit is connected to the first signal path and the second signal path so as to receive both a first processed signal and a second processed signal. The analysis circuit is configured to a complex-valued product signal from the processed signals average the complex-valued product signal over a predetermined number of samples, and determine an averaged power signal based thereon. The control circuit is configured to directly or indirectly add an offset to the averaged power signal.
    Type: Grant
    Filed: September 20, 2022
    Date of Patent: February 25, 2025
    Assignee: Rohde & Schwarz GmbH & Co. KG
    Inventors: Alexander Roth, Gregor Feldhaus, Bernhard Gaede
  • Patent number: 12237242
    Abstract: A semiconductor device package comprises an electrically conductive carrier, a semiconductor die disposed on the carrier, an encapsulant encapsulating part of the carrier and the semiconductor die, an electrically insulating and thermally conductive interface structure, in particular covering an exposed surface portion of the carrier and a connected surface portion of the encapsulant, wherein the interface structure comprises a glass transition temperature in a range between ?40° C. to 150° C.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: February 25, 2025
    Assignee: Infineon Technologies Austria AG
    Inventors: Martin Mayer, Edward Fuergut, Alexander Roth, Karina Rott
  • Publication number: 20250052169
    Abstract: A stator vane assembly (10) and a method for assembling a stator vane assembly (10) of a turbomachine, the stator vane assembly (10) including a plurality of variable stator vanes (11) whose stator vane platform (12) has a stator vane trunnion (13) that is mounted in a receiving opening (14) of a casing (15) of the turbomachine; a stator vane head (16) of the stator vane (11) having a bearing trunnion that is mounted on an inner ring (19) disposed on a rotor (119) of the turbomachine. In the method, a stator vane trunnion (13) disposed on a stator vane platform (12) of a stator vane (11) is inserted into a receiving opening (14) of a casing (15), which receiving opening (14) is disposed radially with respect to a rotor axis of the turbomachine, and an inner ring (19) is provided on a rotor (119) of the turbomachine.
    Type: Application
    Filed: August 7, 2024
    Publication date: February 13, 2025
    Inventors: Alexander RAUSCHMEIER, Christian ROTH, Thomas STIFTNER, Ralf HUBER
  • Patent number: 12218671
    Abstract: A phase coherent synthesizer with good phase noise and spurious performance is described. The phase coherent synthesizer includes digital direct synthesizer (DDS) circuitry, frequency multiplier circuitry, an oscillator, and a mixing stage. The digital direct synthesizer (DDS) circuitry has a first output and a second output. The first output is associated with a fine resolution synthesis. The second output is associated with a step synthesis. A second output signal provided via the second output has a higher frequency compared with a first output signal provided via the first output. The frequency multiplier circuitry is connected with the second output. The frequency multiplier circuitry is configured to multiply the second output signal received via the second output, thereby generating a multiplied output signal. The mixing stage has two input ports connected with the frequency multiplier circuitry and the oscillator respectively.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: February 4, 2025
    Assignee: Rohde & Schwarz GmbH & Co. KG
    Inventors: Alexander Roth, Juergen Rademacher, Ernst Polz
  • Publication number: 20240373548
    Abstract: A pre-soldered circuit carrier includes a carrier having a metal die attach surface, a plated solder region on the metal die attach surface, wherein a maximum thickness of the plated solder region is at most 50 ?m, the plated solder region has a lower melting point than the first bond pad, and the plated solder region forms one or more intermetallic phases with the die attach surface at a soldering temperature that is above the melting point of the plated solder region.
    Type: Application
    Filed: July 13, 2024
    Publication date: November 7, 2024
    Inventors: Alexander Heinrich, Alexander Roth
  • Patent number: 12119284
    Abstract: A DBC substrate for power semiconductor devices includes a ceramic workpiece of a non-oxide ceramic having first and second opposing main sides, the ceramic workpiece having a thickness of 10 ?m or more measured between the first and second main sides, a copper-containing layer disposed over the first main side, the copper-containing layer having a thickness of 5 ?m or more, and an intermediate layer comprising Al2O3 disposed between the ceramic workpiece and the copper-containing layer.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: October 15, 2024
    Assignee: Infineon Technologies Austria AG
    Inventor: Alexander Roth
  • Publication number: 20240335912
    Abstract: A layer structure includes a first layer including at least one material selected from a first group consisting of nickel, copper, gold, silver, palladium, tin, zinc, platinum, and an alloy of any of these materials; a third layer including at least one material selected from a second group consisting of nickel, copper, gold, palladium, tin, silver, zinc, platinum, and an alloy of any of these materials; and a second layer between the first layer and the third layer. The second layer consists of or essentially consists of nickel and tin. The second layer includes an intermetallic phase of nickel and tin. Methods of forming the layer structure, a chip package and a chip arrangement are also described.
    Type: Application
    Filed: June 21, 2024
    Publication date: October 10, 2024
    Inventors: Alexander Heinrich, Alexander Roth, Catharina Wille
  • Publication number: 20240312795
    Abstract: A semiconductor module includes a first metal layer, a ceramic layer applied on the first metal layer, a second metal layer applied at least in part on the ceramic layer, and a semiconductor die attached on a portion of the second metal layer. A method for fabricating the semiconductor module is also described.
    Type: Application
    Filed: March 14, 2024
    Publication date: September 19, 2024
    Inventor: Alexander Roth
  • Patent number: 12069802
    Abstract: A pre-soldered circuit carrier includes a carrier having a metal die attach surface, a plated solder region on the metal die attach surface, wherein a maximum thickness of the plated solder region is at most 50 ?m, the plated solder region has a lower melting point than the first bond pad, and the plated solder region forms one or more intermetallic phases with the die attach surface at a soldering temperature that is above the melting point of the plated solder region.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: August 20, 2024
    Assignee: Infineon Technologies AG
    Inventors: Alexander Heinrich, Alexander Roth
  • Publication number: 20240266237
    Abstract: A method for fabricating a semiconductor package includes: providing a die carrier; disposing a semiconductor die on the die carrier, the semiconductor die having one or more contact pads on a first main face thereof; applying an encapsulant at least partially to the semiconductor die, the encapsulant embedding at least one electrical connector, the electrical connector being connected with a contact pad or with the die carrier and extending to a main face of the encapsulant; and depositing at least one electrical layer onto the main face of the encapsulant and an exposed end of the at least one electrical connector.
    Type: Application
    Filed: January 25, 2024
    Publication date: August 8, 2024
    Inventors: Edward Fürgut, Thorsten Meyer, Wolfgang Scholz, Frank Zudock, Alexander Roth
  • Publication number: 20240266311
    Abstract: A solderable electronic device includes: a base including one or more of a semiconductor die and a power electronic substrate; a first layer arranged over the base, the first layer including a solid reducing agent; and a solder preform arranged over the first layer. The solid reducing agent is configured to reduce a solder material of the solder preform during a soldering process.
    Type: Application
    Filed: January 25, 2024
    Publication date: August 8, 2024
    Inventors: Alexander Roth, Andreas Waterloo
  • Patent number: 12023762
    Abstract: A layer structure includes a first layer including at least one material selected from a first group consisting of nickel, copper, gold, silver, palladium, tin, zinc, platinum, and an alloy of any of these materials; a third layer including at least one material selected from a second group consisting of nickel, copper, gold, palladium, tin, silver, zinc, platinum, and an alloy of any of these materials; and a second layer between the first layer and the third layer. The second layer consists of or essentially consists of nickel and tin. The second layer includes an intermetallic phase of nickel and tin.
    Type: Grant
    Filed: December 23, 2022
    Date of Patent: July 2, 2024
    Assignee: Infineon Technologies AG
    Inventors: Alexander Heinrich, Alexander Roth, Catharina Wille
  • Patent number: 12028117
    Abstract: The present disclosure relates to a method for testing a device under test by using a test system. The method comprises the steps of: generating a wideband modulated signal; forwarding the wideband modulated signal to an input of a device under test; separating an electromagnetic wave reflected at the input by the directional element; forwarding the reflected electromagnetic wave to a test and measurement instrument; processing a reference signal associated with the wideband modulated signal; and determining a channel response by taking the reference signal and at least one scattering parameter of the device under test into account, wherein the scattering parameter depends on the reflected electromagnetic wave. Further, the present disclosure relates to a test system.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: July 2, 2024
    Assignee: ROHDE & SCHWARZ GMBH & CO. KG
    Inventors: Florian Ramian, Wolfgang Dressel, Alexander Roth
  • Publication number: 20240204888
    Abstract: A radio frequency testing apparatus with voltage standing wave ratio adjustment for testing a device under test is provided. Said radio frequency testing apparatus comprises an input, an output, a signal source for providing a test signal for the device under test via the output, thereby forming an output signal path, a signal sink for receiving a received signal from the device under test via the input, thereby forming an input signal path, and a tracking generator. In this context, the tracking generator and/or the signal sink is configured to determine a corresponding voltage standing wave ratio at the input and/or at the output. Furthermore, the signal source is configured to pre-equalize the test signal on the basis of the corresponding voltage standing wave ratio at the output and/or the input. In addition to this or as an alternative, the signal sink is configured to post-correct the received signal on the basis of the corresponding voltage standing wave ratio at the input and/or the output.
    Type: Application
    Filed: December 16, 2022
    Publication date: June 20, 2024
    Applicant: Rohde & Schwarz GmbH & Co. KG
    Inventors: Christian KUHN, Alexander ROTH, Florian RAMIAN
  • Publication number: 20240167802
    Abstract: A deformation detection device and method for an energy storage assembly integrated in a vehicle support structure of a motor vehicle having an energy store and a housing structure, includes an outer sensing element which is formed as or on an outer housing structure element, an inner sensing element which is formed as or on an inner energy storage element, and an evaluation unit which is designed to detect a change in an electrical operating parameter.
    Type: Application
    Filed: February 28, 2022
    Publication date: May 23, 2024
    Inventors: Florian ACHATZ, Clemens BERGMANN, Felix BILGER, Ralph NIESSEN, Philipp Alexander ROTH
  • Patent number: 11966869
    Abstract: Techniques for a modeling platform associated with simulating risk models. According to certain aspects, systems and methods include simulating the impact of qualitative assumptions on the risk model. Accordingly, the risk model may include a hierarchical tree formed of component qualitative assumption objects and quantitative assumption objects. Quantitative assumption objects include indications of distribution function parameters associated with the assumption object and qualitative assumption objects include an indication of an impact on a parent quantitative assumption. When simulating the risk model, systems and methods may adjust sampled values quantitative assumption object when a child qualitative assumption object is enabled.
    Type: Grant
    Filed: April 1, 2022
    Date of Patent: April 23, 2024
    Assignee: MCKINSEY & COMPANY, INC.
    Inventors: Scott Jeffrey Schwaitzberg, Erik Alexander Roth, Matthew John Banholzer, Marcin Chyczewski, Dushyant Agarwal
  • Publication number: 20240094271
    Abstract: A measurement system includes an input port, a signal splitter, first and second signal paths, an analysis circuit, and a control circuit. The input port is configured to receive an input signal to be measured. The signal splitter is configured to split the input signal into a first signal that is forwarded to the first signal path and a second signal that is forwarded to the second signal path. The analysis circuit is connected to the first signal path and the second signal path so as to receive both a first processed signal and a second processed signal. The analysis circuit is configured to a complex-valued product signal from the processed signals average the complex-valued product signal over a predetermined number of samples, and determine an averaged power signal based thereon. The control circuit is configured to directly or indirectly add an offset to the averaged power signal.
    Type: Application
    Filed: September 20, 2022
    Publication date: March 21, 2024
    Applicant: Rohde & Schwarz GmbH & Co. KG
    Inventors: Alexander Roth, Gregor Feldhaus, Bernhard Gaede
  • Patent number: 11936436
    Abstract: An external frontend device is described. The external frontend device includes an integrated synthesizer circuit, a reference signal input, a receiver channel, a transmitter channel, and at least one mixer circuit. The reference signal input is configured to receive a low-frequency reference signal. The reference signal input is configured to forward the received low-frequency reference signal to the integrated synthesizer circuit. The integrated synthesizer circuit is configured to generate a local oscillator (LO) signal based on the low-frequency reference signal. The at least one mixer circuit is associated with the receiver channel and/or with the transmitter channel. The at least one mixer circuit is configured to mix the LO signal with a radio frequency (RF) signal processed by the receiver channel and/or with an intermediate frequency (IF) signal processed by the transmitter channel, thereby obtaining an IF output signal and/or an RF output signal, respectively.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: March 19, 2024
    Assignee: Rohde & Schwarz GmbH & Co. KG
    Inventors: Wolfgang Dressel, Alexander Roth