Abstract: Methods, systems and apparatuses for processor selection in multi-processor systems are disclosed. An example method includes, for each of a plurality of processors, retrieving a list of interrupt instances for a plurality of interrupt types; calculating an interrupt instance count value for each of the plurality of interrupt types; multiplying a corresponding weighting factor by the interrupt instance count value for each one of the plurality of interrupt types to generate a plurality of weighted interrupt values; calculating an overall weighted vector value based on the sum of the plurality of weighted interrupt values; and designating one of the plurality of processors as a selected processor based on the lowest overall weighted vector value.

Abstract: Disclosed herein are systems, methods and storage medium associated with native cloud computing. In embodiments, a system may include a number of clusters of computing nodes, and a data communication network configured to couple the clusters of computing nodes. The system may further include a control node configured to segment or cause segmentation of the data communication network to isolate a cluster of the computing nodes from other clusters of the computing nodes, t for allocation for native execution of a computation task. The system may further include a control network coupled to the data communication network and the control node. Other embodiments may be disclosed and claimed.

Abstract: Methods, systems and apparatuses for processor selection in multi-processor systems are disclosed. An example method includes, for each of a plurality of processors, retrieving a list of interrupt instances for a plurality of interrupt types; calculating an interrupt instance count value for each of the plurality of interrupt types; multiplying a corresponding weighting factor by the interrupt instance count value for each one of the plurality of interrupt types to generate a plurality of weighted interrupt values; calculating an overall weighted vector value based on the sum of the plurality of weighted interrupt values; and designating one of the plurality of processors as a selected processor based on the lowest overall weighted vector value.