Abstract: A method for model-based design of safety-critical software is disclosed. The method includes receiving natural-language software requirements, developing a specification model by implementing either semantic modeling or graphical modeling, applying formal requirements analysis to the specification model, auto generating requirements based and robustness test cases from the specification model, developing a design model based on the specification model, applying test cases to the design model, auto-generating source code using the design model, verifying the source code using both test cases and static analysis technology, and compiling executable object code from the verified source code. If a result of the analysis of the software specification or design models is not satisfactory then adjusting the specification or design model to correct any inconsistency, and repeating applying the analysis and test cases.

Abstract: A method for model-based design of safety-critical software is disclosed. The method includes receiving natural-language software requirements, developing a specification model by implementing either semantic modeling or graphical modeling, applying formal requirements analysis to the specification model, auto generating requirements based and robustness test cases from the specification model, developing a design model based on the specification model, applying test cases to the design model, auto-generating source code using the design model, verifying the source code using both test cases and static analysis technology, and compiling executable object code from the verified source code. If a result of the analysis of the software specification or design models is not satisfactory then adjusting the specification or design model to correct any inconsistency, and repeating applying the analysis and test cases.

Abstract: An apparatus includes a DC-link, a voltage converter, a bus voltage controller, and a supervisory controller. The voltage converter is configured to convert a first DC voltage into a second DC voltage based on a command signal and based on an adjustment signal and to supply the second DC voltage to the DC-link. The bus voltage controller is configured to iterate calculation of the adjustment signal to communicate each iterated calculation of the adjustment signal to the voltage converter. The supervisory controller is configured to iterate calculation of the command signal and to communicate each iterated calculation of the command signal to the voltage converter and to the bus voltage controller. A frequency of the bus voltage controller to communicate each iterated calculation of the adjustment signal is higher than a frequency of the supervisory controller to communicate each iterated calculation of the command signal.

Abstract: An apparatus includes a DC-link, a voltage converter, a bus voltage controller, and a supervisory controller. The voltage converter is configured to convert a first DC voltage into a second DC voltage based on a command signal and based on an adjustment signal and to supply the second DC voltage to the DC-link. The bus voltage controller is configured to iterate calculation of the adjustment signal to communicate each iterated calculation of the adjustment signal to the voltage converter. The supervisory controller is configured to iterate calculation of the command signal and to communicate each iterated calculation of the command signal to the voltage converter and to the bus voltage controller. A frequency of the bus voltage controller to communicate each iterated calculation of the adjustment signal is higher than a frequency of the supervisory controller to communicate each iterated calculation of the command signal.

Abstract: An apparatus includes a DC-link, a voltage converter, a bus voltage controller, and a supervisory controller. The voltage converter is configured to convert a first DC voltage into a second DC voltage based on a command signal and based on an adjustment signal and to supply the second DC voltage to the DC-link. The bus voltage controller is configured to iterate calculation of the adjustment signal to communicate each iterated calculation of the adjustment signal to the voltage converter. The supervisory controller is configured to iterate calculation of the command signal and to communicate each iterated calculation of the command signal to the voltage converter and to the bus voltage controller. A frequency of the bus voltage controller to communicate each iterated calculation of the adjustment signal is higher than a frequency of the supervisory controller to communicate each iterated calculation of the command signal.

Abstract: A process for the transmission of data between a processor and a mass memory unit, initialization and/or control commands are transmitted via a PCMCIA interface to the mass memory unit, while user data, however, are transmitted via a memory interface. Accordingly, a device for the transmission of data between a processor and an (ATA) mass memory unit has a driver designed for switching over the transmission paths of initialization and/or control commands via a PCMCIA interface and of user data via a memory interface.

Abstract: A process for the transmission of data between a processor and a mass memory unit, initialization and/or control commands are transmitted via a PCMCIA interface to the mass memory unit, while user data, however, are transmitted via a memory interface. Accordingly, a device for the transmission of data between a processor and an (ATA) mass memory unit has a driver designed for switching over the transmission paths of initialization and/or control commands via a PCMCIA interface and of user data via a memory interface.