Abstract: Systems and methods for minimally intrusive instruction pointer-aware processing resource activity profiling are disclosed. In one embodiment, a graphics processor includes a grouping of processing resources and control logic that is associated with the grouping of processing resources. The control logic is configured to sample a state of at least one processing resource of the grouping of processing resources and to determine activity data from the state with the activity data including at least one of stalls and reason counts for stalling activity, instruction types, pipeline utilization, thread utilization, and shader activity.

Abstract: Systems and methods for minimally intrusive instruction pointer-aware processing resource activity profiling are disclosed. In one embodiment, a graphics processor includes a grouping of processing resources and control logic that is associated with the grouping of processing resources. The control logic is configured to sample a state of at least one processing resource of the grouping of processing resources and to determine activity data from the state with the activity data including at least one of stalls and reason counts for stalling activity, instruction types, pipeline utilization, thread utilization, and shader activity.

Abstract: Systems and methods for minimally intrusive instruction pointer-aware processing resource activity profiling are disclosed. In one embodiment, a graphics processor includes a grouping of processing resources and control logic that is associated with the grouping of processing resources. The control logic is configured to sample a state of at least one processing resource of the grouping of processing resources and to determine activity data from the state with the activity data including at least one of stalls and reason counts for stalling activity, instruction types, pipeline utilization, thread utilization, and shader activity.

Abstract: A method and system to provide an analysis model to determine the specific problem(s) of a multi-threaded application. In one embodiment of the invention, the multi-thread application uses a plurality of threads for execution and each thread is assigned to a respective one of a plurality of states based on a current state of each thread. By doing so, the specific problem(s) of the multi-threaded application is determined based on the number of transitions among the plurality of states for each thread. In one embodiment of the invention, the analysis model uses worker threads transition counters or events to determine for each parallel region or algorithm of the multi-threaded application which problem has happened and how much it has affected the scalability of the parallel region or algorithm.

Abstract: A method and system to provide an analysis model to determine the specific problem(s) of a multi-threaded application. In one embodiment of the invention, the multi-thread application uses a plurality of threads for execution and each thread is assigned to a respective one of a plurality of states based on a current state of each thread. By doing so, the specific problem(s) of the multi-threaded application is determined based on the number of transitions among the plurality of states for each thread. In one embodiment of the invention, the analysis model uses worker threads transition counters or events to determine for each parallel region or algorithm of the multi-threaded application which problem has happened and how much it has affected the scalability of the parallel region or algorithm.