Patents by Inventor ALEXANDRA DRACEA

ALEXANDRA DRACEA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11138134
    Abstract: A software only debug approach is provided that does not require special hardware in a target embedded system undergoing debug. Instead, already present DMA capabilities of the target system are utilized to transfer I/O operation parameters into a memory area accessible to both the target processor and a debugger executing on a host system. The debugger can thereby access and execute the I/O operations without program execution stopping on the target. A semihosting library is provided as a replacement for the standard C I/O library on the target. The semihosting library provides a range of equivalent functions to the standard C I/O API that program a DMA transfer to copy the I/O function parameters to an external memory area that is not otherwise being used by the target core processor. The external memory area is then accessed by a debug tool on the host computer.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: October 5, 2021
    Assignee: NXP USA, Inc.
    Inventors: Alexandra Dracea, Catalina D. Mitulescu
  • Publication number: 20200371969
    Abstract: A software only debug approach is provided that does not require special hardware in a target embedded system undergoing debug. Instead, already present DMA capabilities of the target system are utilized to transfer I/O operation parameters into a memory area accessible to both the target processor and a debugger executing on a host system. The debugger can thereby access and execute the I/O operations without program execution stopping on the target. A semihosting library is provided as a replacement for the standard C I/O library on the target. The semihosting library provides a range of equivalent functions to the standard C I/O API that program a DMA transfer to copy the I/O function parameters to an external memory area that is not otherwise being used by the target core processor. The external memory area is then accessed by a debug tool on the host computer.
    Type: Application
    Filed: October 23, 2019
    Publication date: November 26, 2020
    Applicant: NXP USA, Inc.
    Inventors: Alexandra Dracea, Catalina D. Mitulescu
  • Patent number: 10191836
    Abstract: A method, system, and apparatus are provided for debugging a compiled computer program having one or more variables by generating variable location information for a first variable stored in a CPU register that is parsed from runtime disassembly information for the compiled computer program and used to generate a pattern to search for the first variable in the runtime disassembly information to identify a program address for the first variable that can be used to set a software program watchpoint for the first variable.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: January 29, 2019
    Assignee: NXP USA, Inc.
    Inventors: Alexandra Dracea, Catalina D. Mitulescu, Daniel D. Popa
  • Publication number: 20180181480
    Abstract: A method, system, and apparatus are provided for debugging a compiled computer program having one or more variables by generating variable location information for a first variable stored in a CPU register that is parsed from runtime disassembly information for the compiled computer program and used to generate a pattern to search for the first variable in the runtime disassembly information to identify a program address for the first variable that can be used to set a software program watchpoint for the first variable.
    Type: Application
    Filed: March 2, 2017
    Publication date: June 28, 2018
    Applicant: NXP USA, Inc.
    Inventors: Alexandra Dracea, Catalina D. Mitulescu, Daniel D. Popa
  • Publication number: 20160299859
    Abstract: There is disclosed an apparatus for external access to core resources (211,212) of a processor (2) comprising a processing core (21), a shared memory (22), and a multiple paths Direct Memory Access, DMA, controller (23). Access to core critical resources can be performed while the core is executing an application program. The proposed apparatus comprises a Manager module (13) which is operable to setup the DMA controller to copy the assigned core resources via allocated DMA channel into a safe memory region. Further, an Observer module (14) is operable to read the transferred data and make the correlation on the host apparatus side. This allows accessing data used by the core via the DMA controller into, e.g., a run-time debugger accessible region.
    Type: Application
    Filed: November 22, 2013
    Publication date: October 13, 2016
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Daniel Dumitru Popa, ALEXANDRA DRACEA, DRAGOS MILOIU