Patents by Inventor Alexandre Ardelea

Alexandre Ardelea has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit clock analysis with macro models
    Patent number: 8464195
    Abstract: An integrated circuit clock analysis system receives a cell library of gates of the integrated circuit and generates a macro model for each of the gates, where each macro model includes at least one of a nonlinear current source model, an input parasitics model or a nonlinear capacitors model. The system then tunes the macro models and generates a simulation deck from an electrical netlist of a layout of the integrated circuit and the tuned macro models. The system then performs clock analysis simulation based on the simulation deck.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: June 11, 2013
    Assignee: Oracle International Corporation
    Inventors: Alexander Korobkov, Bogdan Tutuianu, Alexandre Ardelea, Amit Agarwal