Patents by Inventor Alexandre Coullomb

Alexandre Coullomb has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11641002
    Abstract: A device includes a substrate and an optoelectronic chip buried in the substrate. The substrate may include an opening above a first optical transduction region of the first optoelectronic chip and above a second optical transduction region of a second optoelectronic chip.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: May 2, 2023
    Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Alexandre Coullomb, Romain Coffy, Jean-Michel Riviere
  • Publication number: 20210202781
    Abstract: A device includes a substrate and an optoelectronic chip buried in the substrate. The substrate may include an opening above a first optical transduction region of the first optoelectronic chip and above a second optical transduction region of a second optoelectronic chip.
    Type: Application
    Filed: March 11, 2021
    Publication date: July 1, 2021
    Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Alexandre COULLOMB, Romain COFFY, Jean-Michel RIVIERE
  • Patent number: 11038595
    Abstract: An optoelectronic device includes a substrate and a first optoelectronic chip flush with a surface of the substrate. The device includes a cover that covers the substrate and the first optoelectronic chip. The cover comprises a cavity above a first optical transduction region of the first optoelectronic chip. The device also includes a second optoelectronic chip having a second optical transduction region spaced apart from the first optical transduction region and the cavity continues above the second optical transduction region.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: June 15, 2021
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Alexandre Coullomb, Romain Coffy, Jean-Michel Riviere
  • Patent number: 10978607
    Abstract: A device includes a substrate and an optoelectronic chip buried in the substrate. The substrate may include an opening above a first optical transduction region of the first optoelectronic chip and above a second optical transduction region of a second optoelectronic chip.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: April 13, 2021
    Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Alexandre Coullomb, Romain Coffy, Jean-Michel Riviere
  • Publication number: 20200312735
    Abstract: A substrate includes a through cavity. A heat sink is mounted so as to close one end of the through cavity. An integrated circuit (IC) chip is also mounted in the cavity. Conductive wires provide an electrical connection between pads on an upper surface of the IC chip and metallizations on the substrate. The mounted heat sink is positioned within the substrate in one implementation and positioned mounted to a back surface of the substrate in another implementation.
    Type: Application
    Filed: March 25, 2020
    Publication date: October 1, 2020
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventors: Romain COFFY, Alexandre COULLOMB, Olivier FRANIATTE
  • Publication number: 20190356390
    Abstract: An optoelectronic device includes a substrate and a first optoelectronic chip flush with a surface of the substrate. The device includes a cover that covers the substrate and the first optoelectronic chip. The cover comprises a cavity above a first optical transduction region of the first optoelectronic chip. The device also includes a second optoelectronic chip having a second optical transduction region spaced apart from the first optical transduction region and the cavity continues above the second optical transduction region.
    Type: Application
    Filed: May 10, 2019
    Publication date: November 21, 2019
    Inventors: Alexandre COULLOMB, Romain COFFY, Jean-Michel RIVIERE
  • Publication number: 20190355864
    Abstract: A device includes a substrate and an optoelectronic chip buried in the substrate. The substrate may include an opening above a first optical transduction region of the first optoelectronic chip and above a second optical transduction region of a second optoelectronic chip.
    Type: Application
    Filed: May 10, 2019
    Publication date: November 21, 2019
    Inventors: Alexandre COULLOMB, Romain COFFY, Jean-Michel RIVIERE
  • Patent number: 9349671
    Abstract: An electronic device includes a substrate wafer made of many layers of an insulating material and including an electrical connection network. An integrated circuit chip is mounted to a top side of the substrate wafer. The substrate wafer further includes a metal plate that is integrated into the substrate wafer and thermally coupled to the integrated circuit chip. The metal plate may have a thickness in excess of several layers of the substrate wafer. The metal plate may include a duct through which a thermally conductive fluid flows.
    Type: Grant
    Filed: October 10, 2014
    Date of Patent: May 24, 2016
    Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventor: Alexandre Coullomb
  • Publication number: 20150102499
    Abstract: An electronic device includes a substrate wafer made of many layers of an insulating material and including an electrical connection network. An integrated circuit chip is mounted to a top side of the substrate wafer. The substrate wafer further includes a metal plate that is integrated into the substrate wafer and thermally coupled to the integrated circuit chip. The metal plate may have a thickness in excess of several layers of the substrate wafer. The metal plate may include a duct through which a thermally conductive fluid flows.
    Type: Application
    Filed: October 10, 2014
    Publication date: April 16, 2015
    Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventor: Alexandre Coullomb