Patents by Inventor Alexandre de Baynast
Alexandre de Baynast has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9652354Abstract: Examining time series sequences representing performance counters from executing programs can provide significant clues about potential malfunctions, busy periods in terms of traffic on networks, intensive processing cycles and so on. An unsupervised anomaly detector can detect anomalies for any time series. A combination of known techniques from statistics, signal processing and machine learning can be used to identify outliers on unsupervised data, and to capture anomalies like edge detection, spike detection, and pattern error anomalies. Boolean and probabilistic results concerning whether an anomaly was detected can be provided.Type: GrantFiled: March 18, 2014Date of Patent: May 16, 2017Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC.Inventors: Vitaly Filimonov, Panagiotis Periorellis, Dmitry Starostin, Alexandre de Baynast, Eldar Akchurin, Aleksandr Klimov, Thomas Minka, Alexander Spengler
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Patent number: 9378079Abstract: Anomalies detection in error signals of a cloud based service is provided. An application such as an analysis application identifies a machine learning algorithm that matches error signals of components of a cloud based service. A periodic pattern from the error signals is removed with the machine learning algorithm to filter the periodic pattern from an error count in the error signals. The error signals are processed with the machine learning algorithm to detect one or more anomalies with the components. The machine learning algorithm is updated while processing new data to detect new patterns.Type: GrantFiled: September 2, 2014Date of Patent: June 28, 2016Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Olga Ivanova, Smita Ojha, Alexandre de Baynast, Markus Cozowicz, Ulrich Pinsdorf, Yi Wang, Philipp Kranen, Venkat Narayanan
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Publication number: 20160179063Abstract: A control system is described which receives a live data steam of time stamped sensor data observed from a system. The control system accesses a store of time-stamped sensor data from the live data stream. A plurality of pipeline configurations is generated for analyzing the live data stream. Each pipeline configuration comprises a plurality of components for analyzing data, an order of the components, and values of one or more parameters of each component. The pipeline configurations are evaluated by applying the pipeline configurations to data from the store. A ground truth selector is configured to receive user input comprising ground truth data being labeled data items from the store of time-stamped sensor data. The pipeline configurations are re-evaluated using the ground truth data to select one of the pipeline configurations. Control is achieved using output of the selected one of the pipeline configurations executing on the live data stream.Type: ApplicationFiled: December 17, 2014Publication date: June 23, 2016Inventors: Alexandre De Baynast De Septfontaines, Markus Cozowicz, Philipp Kranen, Thomas Santen
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Publication number: 20160062815Abstract: Anomalies detection in error signals of a cloud based service is provided. An application such as an analysis application identifies a machine learning algorithm that matches error signals of components of a cloud based service. A periodic pattern from the error signals is removed with the machine learning algorithm to filter the periodic pattern from an error count in the error signals. The error signals are processed with the machine learning algorithm to detect one or more anomalies with the components. The machine learning algorithm is updated while processing new data to detect new patterns.Type: ApplicationFiled: September 2, 2014Publication date: March 3, 2016Inventors: Olga Ivanova, Smita Ojha, Alexandre de Baynast, Markus Cozowicz, Ulrich Pinsdorf, Yi Wang, Philipp Kranen, Venkat Narayanan
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Publication number: 20150269050Abstract: Examining time series sequences representing performance counters from executing programs can provide significant clues about potential malfunctions, busy periods in terms of traffic on networks, intensive processing cycles and so on. An unsupervised anomaly detector can detect anomalies for any time series. A combination of known techniques from statistics, signal processing and machine learning can be used to identify outliers on unsupervised data, and to capture anomalies like edge detection, spike detection, and pattern error anomalies. Boolean and probabilistic results concerning whether an anomaly was detected can be provided.Type: ApplicationFiled: March 18, 2014Publication date: September 24, 2015Applicant: Microsoft CorporationInventors: Vitaly Filimonov, Panagiotis Periorellis, Dmitry Starostin, Alexandre de Baynast, Eldar Akchurin, Aleksandr Klimov, Thomas Minka, Alexander Spengler
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Patent number: 8869003Abstract: The invention relates to low density parity check decoding. A method for decoding an encoded data block is described. Encoded data block comprising data sub-blocks are stored. Decoding is performed in a pipelined manner using an irregular, block-structured parity check matrix, where at least two data sub-block matrices of the parity check matrix are read from and written in each of a plurality of clock cycles. The reading and writing of the data sub-blocks is evenly distributed between at least two area of a memory. The decoding is performed with shift values which eliminate cycles at or below a predetermined threshold length. An apparatus, computer program product and device are also described.Type: GrantFiled: May 24, 2012Date of Patent: October 21, 2014Assignee: Core Wireless Licensing S.A.R.L.Inventors: Predrag Radosavljevic, Marjan Karkooti, Alexandre de Baynast, Joseph R. Cavallaro
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Patent number: 8869162Abstract: A stream processing execution engine evaluates development-time performance characteristic estimates in combination with run-time parameters to schedule execution of stream processing software components in a stack of a stream processing application that satisfy a defined performance criterion in a heterogeneous hardware device. A stream processing application includes a stack of interdependent stream processing software components. A stream processing execution engine evaluates one or more performance characteristics of multiple computational resources in the heterogeneous hardware device. Each performance characteristic is associated with performance of a computational resource in executing a computational-resource-dependent instance of a stream processing software component. The stream processing execution engine schedules within the run-time environment a computational resource on which to execute a computational-resource-dependent instance of one of the stream processing software components.Type: GrantFiled: April 26, 2011Date of Patent: October 21, 2014Assignee: Microsoft CorporationInventors: Alexandre de Baynast, Arsalan Ahmad, Andreas Steinmetzler, Thomas Santen, Satnam Singh, Alain Gefflaut, William Dunlap
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Publication number: 20120278811Abstract: A stream processing execution engine evaluates development-time performance characteristic estimates in combination with run-time parameters to schedule execution of stream processing software components in a stack of a stream processing application that satisfy a defined performance criterion in a heterogeneous hardware device. A stream processing application includes a stack of interdependent stream processing software components. A stream processing execution engine evaluates one or more performance characteristics of multiple computational resources in the heterogeneous hardware device. Each performance characteristic is associated with performance of a computational resource in executing a computational-resource-dependent instance of a stream processing software component. The stream processing execution engine schedules within the run-time environment a computational resource on which to execute a computational-resource-dependent instance of one of the stream processing software components.Type: ApplicationFiled: April 26, 2011Publication date: November 1, 2012Applicant: Microsoft CorporationInventors: Alexandre de Baynast, Arsalan Ahmad, Andreas Steinmetzler, Thomas Santen, Satnam Singh, Alain Gefflaut, William Dunlap
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Publication number: 20120240003Abstract: The invention relates to low density parity check decoding. A method for decoding an encoded data block is described. Encoded data block comprising data sub-blocks are stored. Decoding is performed in a pipelined manner using an irregular, block-structured parity check matrix, where at least two data sub-block matrices of the parity check matrix are read from and written in each of a plurality of clock cycles. The reading and writing of the data sub-blocks is evenly distributed between at least two area of a memory. The decoding is performed with shift values which eliminate cycles at or below a predetermined threshold length. An apparatus, computer program product and device are also described.Type: ApplicationFiled: May 24, 2012Publication date: September 20, 2012Inventors: Predrag Radosavljevic, Marjan Karkooti, Alexandre de Baynast, Joseph R. Cavallaro
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Patent number: 8219876Abstract: The invention relates to low density parity check decoding. A method for decoding an encoded data block is described. Encoded data block comprising data sub-blocks are stored. Decoding is performed in a pipelined manner using an irregular, block-structured parity check matrix, where at least two data sub-block matrices of the parity check matrix are read from and written in each of a plurality of clock cycles. The reading and writing of the data sub-blocks is evenly distributed between at least two area of a memory. The decoding is performed with shift values which eliminate cycles at or below a predetermined threshold length. An apparatus, computer program product and device are also described.Type: GrantFiled: October 24, 2007Date of Patent: July 10, 2012Assignee: Core Wireless Licensing, S.a.r.l.Inventors: Predrag Radosavljevic, Marjan Karkooti, Alexandre de Baynast, Joseph R. Cavallaro
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Patent number: 7961726Abstract: A framework capable of providing transparent handling of network traffic in close proximity networks such as home networks is provided. A single virtual network interface is exposed to users/applications on connected devices. A virtual network interface manager determines available physical network interfaces and switches to a different physical network interface or a different configuration on the same physical network interface in a transparent manner to the communicating application(s). This enables the framework to optimize network communications for the communicating applications, devices, and users based on predefined criteria, application requirements such as different data throughput, or changing environment conditions such as interference. Network communication operations are also simplified for users since they are no longer required to have the necessary knowledge for configuring physical network interfaces manually in response to changing conditions.Type: GrantFiled: October 7, 2008Date of Patent: June 14, 2011Assignee: Microsoft CorporationInventors: Zhou Wang, Alain Gefflaut, Alexandre de Baynast, Arsalan Ahmad, Andreas Steinmetzler
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Patent number: 7821980Abstract: A method including transmitting a binary vector from a source node to a relay node and receiving a signal vector at the relay node. The method also includes compressing the signal at the relay node by multiplying the signal with a matrix using probabilities and converting output probabilities from the multiplying into retransmission signal amplitudes, the signal amplitude depending not only on a probability of a bit but on a transmission power constraint at the relay node. The method also includes transmitting, by the relay node, estimates of information from the source node to a destination node.Type: GrantFiled: August 3, 2006Date of Patent: October 26, 2010Assignee: Nokia CorporationInventors: Arnab Chakrabarti, Alexandre de Baynast, Ashutosh Sabharwal, Behnaam Aazhang
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Publication number: 20100085975Abstract: A framework capable of providing transparent handling of network traffic in close proximity networks such as home networks is provided. A single virtual network interface is exposed to users/applications on connected devices. A virtual network interface manager determines available physical network interfaces and switches to a different physical network interface or a different configuration on the same physical network interface in a transparent manner to the communicating application(s). This enables the framework to optimize network communications for the communicating applications, devices, and users based on predefined criteria, application requirements such as different data throughput, or changing environment conditions such as interference. Network communication operations are also simplified for users since they are no longer required to have the necessary knowledge for configuring physical network interfaces manually in response to changing conditions.Type: ApplicationFiled: October 7, 2008Publication date: April 8, 2010Applicant: Microsoft CorporationInventors: Zhou Wang, Alain Gefflaut, Alexandre de Baynast, Arsalan Ahmad, Andreas Steinmetzler
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Publication number: 20090113256Abstract: The invention relates to low density parity check decoding. A method for decoding an encoded data block is described. Decoding is performed in a pipelined manner using a layered belief propagation technique and scalable resources, which are configurable to accommodate at least two codeword lengths and at least two code rates. A computer program product, apparatus and device are also described.Type: ApplicationFiled: October 24, 2007Publication date: April 30, 2009Inventors: Predrag Radosavljevic, Marjan Karkooti, Alexandre de Baynast, Joseph R. Cavallaro
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Publication number: 20090113276Abstract: The invention relates to low density parity check decoding. A method for decoding an encoded data block is described. Encoded data block comprising data sub-blocks are stored. Decoding is performed in a pipelined manner using an irregular, block-structured parity check matrix, where at least two data sub-block matrices of the parity check matrix are read from and written in each of a plurality of clock cycles. The reading and writing of the data sub-blocks is evenly distributed between at least two area of a memory. The decoding is performed with shift values which eliminate cycles at or below a predetermined threshold length. An apparatus, computer program product and device are also described.Type: ApplicationFiled: October 24, 2007Publication date: April 30, 2009Inventors: Predrag Radosavljevic, Marjan Karkooti, Alexandre de Baynast, Joseph R. Cavallaro
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Publication number: 20080052608Abstract: A method including transmitting a binary vector from a source node to a relay node and receiving a signal vector at the relay node. The method also includes compressing the signal at the relay node by multiplying the signal with a matrix using probabilities and converting output probabilities from the multiplying into retransmission signal amplitudes, the signal amplitude depending not only on a probability of a bit but on a transmission power constraint at the relay node. The method also includes transmitting, by the relay node, estimates of information from the source node to a destination node.Type: ApplicationFiled: August 3, 2006Publication date: February 28, 2008Inventors: Arnab Chakrabarti, Alexandre de Baynast, Ashutosh Sabharwal, Behnaam Aazhang