Patents by Inventor Alexandre Huffenus

Alexandre Huffenus has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10797654
    Abstract: The present invention relates to an amplification device (10) of an input signal comprising: a first amplification stage (12), a second amplification stage (14), each amplification stage (12, 14) comprising: a switching circuit (22), the switching circuit (22) being able to generate, as output (22A, 22B), a switched signal having at least two states, and an inductive element (24) able to smooth the switched signal to obtain a smoothed signal (I1, I3), the smoothed signal (I1, I3) having a useful component and a stray component. The amplification device (10) further comprises a compensation circuit (16), for each amplification stage (12, 14), able to generate a compensation signal (I2, I4) of the stray component of the smoothed signal (I1, I3) generated in the inductive element (24) of the corresponding amplification stage (12, 14).
    Type: Grant
    Filed: August 21, 2017
    Date of Patent: October 6, 2020
    Assignee: DEVIALET
    Inventors: Alexandre Huffenus, Pierre-Emmanuel Calmel
  • Patent number: 10454384
    Abstract: A switching power supply is provided which includes an input for an input current at an input voltage, a controlled transistor bridge having two branches each with two transistors, the two branches being connected in parallel to the input terminals, a transformer having a primary connected between the midpoints of the two branches formed between the transistors of each branch, an output for an output current connected to the terminals of a secondary circuit of the transformer, and a control unit for the transistors to alternately switch each of the midpoints between high and low values with a time offset between the switching times of the midpoint values. The control unit is also capable of ensuring that the time order for switching of the midpoints between the high and low values thereof varies over the course of time.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: October 22, 2019
    Assignee: DEVIALET
    Inventors: Mathieu Pernot, Alexandre Huffenus, Pierre-Emmanuel Calmel
  • Patent number: 10141893
    Abstract: The input stage (16) of a high-fidelity amplifier (10) with high linearity and a low distortion rate comprises: —an input (12) for the digital signal to be converted;—a voltage output (26) for the converted voltage;—a digital/analog converter (20), the input of which forms the input (12) for the digital signal to be converted, the digital/analog converter (20) having access to a signal terminal (24);—a voltage current conversion resistor (36) arranged between the voltage output (26) and a reference potential; and—a current/voltage converter (22) that has a voltage output and is arranged between the signal terminal (24) and the voltage outlet (26). The current/voltage converter (22) comprises a transistor (46). The source of the transistor (46) is only connected to the signal terminal (24) of the digital/analog converter (20).
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: November 27, 2018
    Assignee: Devialet
    Inventors: Pierre-Emmanuel Calmel, Alexandre Huffenus
  • Patent number: 10134442
    Abstract: The present invention concerns a synchronization method for synchronizing at least two systems for rendering multimedia streams, the method comprising: the detection of a pulse of a same signal of fixed frequency by each rendering system and by a main clock system, the generation of a main clock signal and a dependent clock signal, the estimating of a main local date of reception of the subsequent pulse and a dependent local date of reception of the subsequent pulse, the calculation of the difference between the main local date and the dependent local date, the iteration of the preceding steps until a first condition concerning the calculated differences is met, the receiving of a multimedia stream, by each of the rendering systems, the sending of a rendering date, and the calculation of an effective date for the rendering of the multimedia stream.
    Type: Grant
    Filed: February 10, 2016
    Date of Patent: November 20, 2018
    Assignee: DEVIALET
    Inventors: Charles Coqueret, Pierre-Emmanuel Calmel, Alexandre Huffenus
  • Patent number: 10116271
    Abstract: The current-to-voltage converter includes an input for the current to be converted, an output for the converted voltage, a current-to-voltage conversion resistor arranged between the output and a reference potential, a processing circuit including a transistor, the input being connected to the output via the transistor, a twin circuit including components identical to and disposed in a similar way to those of the processing circuit, a voltage follower connected at the input to the processing circuit and at the output to the twin circuit, and means for reinjecting the current at the output of the follower into the processing circuit.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: October 30, 2018
    Assignee: Devialet
    Inventors: Alexandre Huffenus, Pierre-Emmanuel Calmel, David Aimé Pierre Gras
  • Publication number: 20170272039
    Abstract: The input stage (16) of a high-fidelity amplifier (10) with high linearity and a low distortion rate comprises:—an input (12) for the digital signal to be converted;—a voltage output (26) for the converted voltage;—a digital/analog converter (20), the input of which forms the input (12) for the digital signal to be converted, the digital/analog converter (20) having access to a signal terminal (24);—a voltage current conversion resistor (36) arranged between the voltage output (26) and a reference potential; and—a current/voltage converter (22) that has a voltage output and is arranged between the signal terminal (24) and the voltage outlet (26). The current/voltage converter (22) comprises a transistor (46). The source of the transistor (46) is only connected to the signal terminal (24) of the digital/analog converter (20).
    Type: Application
    Filed: July 23, 2015
    Publication date: September 21, 2017
    Inventors: Pierre-Emmanuel Calmel, Alexandre Huffenus
  • Patent number: 8665024
    Abstract: An amplifier including: an output stage having two first power supply terminals capable of receiving a first voltage defined by first positive and negative variable potentials with respect to a reference potential; and a circuit for controlling the current in transistors of the output stage with a reference value, wherein the output stage includes a first and a second MOS transistors in series between the first two terminals, the junction point of this series association defining an output terminal of the amplifier; the control circuit includes two measurement MOS transistors having their respective sources and gates coupled to the respective sources and gates of the first and second transistors of the output stage; at least one control branch, comprising transistors in series between two terminals of application of a second voltage, defines nodes connected to the gates of the output transistors, said second voltage being greater than the first one.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: March 4, 2014
    Assignee: EASII IC SAS
    Inventors: Alexandre Huffenus, Serge Pontarollo
  • Patent number: 8487704
    Abstract: A method generates a reference voltage by steps including: generating a reference signal from a voltage source; generating a comparison signal of the reference signal with a voltage reference; sampling the comparison signal; adjusting a numerical value as a function of the result of the comparison and of the numerical value; and converting the current numerical value into a voltage corresponding to the reference voltage.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: July 16, 2013
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Vincent Rabary, Frédéric Goutti, Robert Cittadini, Alexandre Huffenus, Gael Pillonnet
  • Patent number: 8198756
    Abstract: The invention relates to a voltage-boosting stage (100) comprising a first capacitive voltage circuit (S1, S2, S3, S4, C0, Cb) coupled to a power supply (Vs) and providing an output voltage at an output terminal. The voltage-boosting stage further comprises a second capacitive voltage circuit (S5, S6, S7, S8, C1, Cb) coupled to a power supply (Vs) and providing another output voltage at another output terminal the output terminal and the other terminals being coupled together and further coupled to a supply terminal of a power stage (S9, S10) for implementing a two-level boosted power stage.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: June 12, 2012
    Assignee: NXP B.V.
    Inventors: Berry A. J. Buter, Alexandre Huffenus
  • Publication number: 20120126892
    Abstract: A method generates a reference voltage by steps including: generating a reference signal from a voltage source; generating a comparison signal of the reference signal with a voltage reference; sampling the comparison signal; adjusting a numerical value as a function of the result of the comparison and of the numerical value; and converting the current numerical value into a voltage corresponding to the reference voltage.
    Type: Application
    Filed: September 8, 2011
    Publication date: May 24, 2012
    Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Vincent Rabary, Frédéric Goutti, Robert Cittadini, Alexandre Huffenus, Gael Pillonnet
  • Patent number: 8054130
    Abstract: A method and corresponding circuit that adjusts the gain of an audio output stage having a class D amplifier, this method including the steps of setting the gain to a nominal value, analyzing an output signal during successive clock periods, counting the number of clock periods during which the signal is in a state corresponding to a saturation, decreasing the gain if the number reaches, before the end of a first time interval, a value corresponding to a first percentage, maintaining the gain constant if, at the end of a second time interval, different from the first interval, the number corresponds to a second percentage being comprised between the first percentage and a third percentage, and increasing the gain if, at the end of the second time interval, the number corresponds to a fourth percentage, lower than the third percentage.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: November 8, 2011
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Vincent Rabary, Robert Cittadini, Alexandre Huffenus, Gaël Pillonnet
  • Publication number: 20100253429
    Abstract: A method and corresponding circuit that adjusts the gain of an audio output stage having a class D amplifier, this method including the steps of setting the gain to a nominal value, analyzing an output signal during successive clock periods, counting the number of clock periods during which the signal is in a state corresponding to a saturation, decreasing the gain if the number reaches, before the end of a first time interval, a value corresponding to a first percentage, maintaining the gain constant if, at the end of a second time interval, different from the first interval, the number corresponds to a second percentage being comprised between the first percentage and a third percentage, and increasing the gain if, at the end of the second time interval, the number corresponds to a fourth percentage, lower than the third percentage.
    Type: Application
    Filed: March 31, 2010
    Publication date: October 7, 2010
    Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Vincent Rabary, Robert Cittadini, Alexandre Huffenus, Gaël Pillonnet
  • Publication number: 20100038972
    Abstract: The invention relates to a voltage-boosting stage (100) comprising a first capacitive voltage circuit (S1, S2, S3, S4, CO, Cb) coupled to a power supply (Vs) and providing an output voltage at an output terminal. The voltage-boosting stage further comprises a second capacitive voltage circuit (S5, S6, S7, S8, C1, Cb) coupled to a power supply (Vs) and providing another output voltage at another output terminal the output terminal and the other terminals being coupled together and further coupled to a supply terminal of a power stage (S9, S1O) for implementing a two-level boosted power stage.
    Type: Application
    Filed: October 19, 2007
    Publication date: February 18, 2010
    Applicant: NXP, B.V.
    Inventors: Berry A. J. Buter, Alexandre Huffenus