Patents by Inventor Alexandre MILOUCHEV

Alexandre MILOUCHEV has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • NUMA scheduling using inter-VCPU memory access estimation
    Patent number: 9977738
    Abstract: In a system having non-uniform memory access architecture, with a plurality of nodes, memory access by entities such as virtual CPUs is estimated by invalidating a selected sub-set of memory units, and then detecting and compiling access statistics, for example by counting the page faults that arise when any virtual CPU accesses an invalidated memory unit. The entities, or pairs of entities, may then be migrated or otherwise co-located on the node for which they have greatest memory locality.
    Type: Grant
    Filed: October 10, 2016
    Date of Patent: May 22, 2018
    Assignee: VMware, Inc.
    Inventors: Rajesh Venkatasubramanian, Puneet Zaroo, Alexandre Milouchev
  • NUMA SCHEDULING USING INTER-VCPU MEMORY ACCESS ESTIMATION
    Publication number: 20170031819
    Abstract: In a system having non-uniform memory access architecture, with a plurality of nodes, memory access by entities such as virtual CPUs is estimated by invalidating a selected sub-set of memory units, and then detecting and compiling access statistics, for example by counting the page faults that arise when any virtual CPU accesses an invalidated memory unit. The entities, or pairs of entities, may then be migrated or otherwise co-located on the node for which they have greatest memory locality.
    Type: Application
    Filed: October 10, 2016
    Publication date: February 2, 2017
    Inventors: Rajesh VENKATASUBRAMANIAN, Puneet ZAROO, Alexandre MILOUCHEV
  • NUMA scheduling using inter-vCPU memory access estimation
    Patent number: 9465669
    Abstract: In a system having non-uniform memory access architecture, with a plurality of nodes, memory access by entities such as virtual CPUs is estimated by invalidating a selected sub-set of memory units, and then detecting and compiling access statistics, for example by counting the page faults that arise when any virtual CPU accesses an invalidated memory unit. The entities, or pairs of entities, may then be migrated or otherwise co-located on the node for which they have greatest memory locality.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: October 11, 2016
    Assignee: VMware, Inc.
    Inventors: Rajesh Venkatasubramanian, Puneet Zaroo, Alexandre Milouchev
  • NUMA Scheduling Using Inter-vCPU Memory Access Estimation
    Publication number: 20150052287
    Abstract: In a system having non-uniform memory access architecture, with a plurality of nodes, memory access by entities such as virtual CPUs is estimated by invalidating a selected sub-set of memory units, and then detecting and compiling access statistics, for example by counting the page faults that arise when any virtual CPU accesses an invalidated memory unit. The entities, or pairs of entities, may then be migrated or otherwise co-located on the node for which they have greatest memory locality.
    Type: Application
    Filed: March 7, 2014
    Publication date: February 19, 2015
    Applicant: VMware, Inc.
    Inventors: Rajesh VENKATASUBRAMANIAN, Puneet ZAROO, Alexandre MILOUCHEV