Patents by Inventor Alexandre P. Ferreira
Alexandre P. Ferreira has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10896059Abstract: Dynamically allocating cache in a multi-tenant infrastructure includes monitoring cache usage for multiple workloads in a multi-tenant processing infrastructure to determine a workload phase. A baseline performance level per workload is determined. The baseline performance level is dependent upon the workload phase. The workloads for each tenant are categorized based on cache utilization and the cache is allocated to each workload based on the baseline performance level, cache utilization, and system wide cache capacity.Type: GrantFiled: March 13, 2017Date of Patent: January 19, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Wesley M. Felter, Alexandre P. Ferreira, Karthick Rajamani, Juan C. Rubio, Cong Xu
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Publication number: 20180260330Abstract: Dynamically allocating cache in a multi-tenant infrastructure includes monitoring cache usage for multiple workloads in a multi-tenant processing infrastructure to determine a workload phase. A baseline performance level per workload is determined. The baseline performance level is dependent upon the workload phase. The workloads for each tenant are categorized based on cache utilization and the cache is allocated to each workload based on the baseline performance level, cache utilization, and system wide cache capacity.Type: ApplicationFiled: March 13, 2017Publication date: September 13, 2018Inventors: Wesley M. Felter, Alexandre P. Ferreira, Karthick Rajamani, Juan C. Rubio, Cong Xu
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Patent number: 9286959Abstract: A memory is provided that comprises a bank of non-volatile memory cells configured into a plurality of banklets. Each banklet in the plurality of banklets can be enabled separately and independently of the other banklets in the bank of non-volatile memory cells. The memory further comprises peripheral banklet circuitry, coupled to the bank of a non-volatile memory array, that is configured to enable selected subsets of bit lines within a selected banklet within the plurality of banklets. Moreover, the memory comprises banklet select circuitry, coupled to the peripheral banklet circuitry, that is configured to select data associated with a selected banklet for reading out from the banklet or writing to the banklet.Type: GrantFiled: November 18, 2013Date of Patent: March 15, 2016Assignee: International Business Machines CorporationInventors: Alexandre P. Ferreira, Jente B. Kuang, Janani Mukundan, Karthick Rajamani
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Patent number: 9135577Abstract: A mechanism is provided for statistical determination of power circuit connectivity based on signal detection in a circuit. Signal data from the circuit gathered and a determination is made as to whether a signal of interest is present in the gathered signal data from the circuit using a statistical analysis of the gathered signal data. The statistical analysis comprises using a mean current value and statistical deviation of the current value of the signal data over a predetermined period of time to compute a confidence range. The confidence range is compared to a first threshold and a second threshold. A determination is made that the signal is present in response to the confidence range being above the first threshold. A determination is made that the signal is not present in response to the confidence range being below the second threshold.Type: GrantFiled: October 10, 2012Date of Patent: September 15, 2015Assignee: International Business Machines CorporationInventors: Wael R. El-Essawy, Alexandre P. Ferreira, Thomas W. Keller, Jr., Sani R. Nassif, Karthick Rajamani, Juan C. Rubio
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Patent number: 9081606Abstract: A processor includes a processor core, a cache, and a tracker. The processor core is configured to execute persistent write instructions and receive notifications of completed persistent write instructions. The tracker is configured to track the completion state of a persistent write instruction.Type: GrantFiled: November 13, 2012Date of Patent: July 14, 2015Assignee: International Business Machines CorporationInventors: Gary D. Carpenter, Stefanie R. Chiras, Alexandre P. Ferreira, Jente B. Kuang, Karthick Rajamani, Freeman L. Rawson, III
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Publication number: 20150143020Abstract: A memory is provided that comprises a bank of non-volatile memory cells configured into a plurality of banklets. Each banklet in the plurality of banklets can be enabled separately and independently of the other banklets in the bank of non-volatile memory cells. The memory further comprises peripheral banklet circuitry, coupled to the bank of a non-volatile memory array, that is configured to enable selected subsets of bit lines within a selected banklet within the plurality of banklets. Moreover, the memory comprises banklet select circuitry, coupled to the peripheral banklet circuitry, that is configured to select data associated with a selected banklet for reading out from the banklet or writing to the banklet.Type: ApplicationFiled: November 18, 2013Publication date: May 21, 2015Applicant: International Business Machines CorporationInventors: Alexandre P. Ferreira, Jente B. Kuang, Janani Mukundan, Karthick Rajamani
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Patent number: 8909954Abstract: A mechanism is provided for dynamically changing power caps for a set of powered elements. Current being consumed by the set of powered elements P on a branch circuit is measured and available current on the branch circuit is determined. A new total power cap for a current time period t is identified based on a current total power cap and the measured current. A difference in total power caps (?TPC) is determined and, for each powered element p in the set of powered elements P at the current time period, a new power cap PC (p,t) is determined based on the previous power cap PC(p,t?1) and the difference of the total power caps to the set of powered elements P. A power cap of each powered element p is then dynamically set to the new power cap PC (p,t).Type: GrantFiled: August 21, 2012Date of Patent: December 9, 2014Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Thomas M. Brey, Wael R. El-Essawy, Alexandre P. Ferreira, Thomas W. Keller, Jr.
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Publication number: 20140136786Abstract: A processor includes a processor core, a cache, and a tracker. The processor core is configured to execute persistent write instructions and receive notifications of completed persistent write instructions. The tracker is configured to track the completion state of a persistent write instruction.Type: ApplicationFiled: November 13, 2012Publication date: May 15, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Gary D. Carpenter, Stefanie R. Chiras, Alexandre P. Ferreira, Jente B. Kuang, Karthick Rajamani, Freeman L. Rawson, III
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Publication number: 20140100804Abstract: A mechanism is provided for statistical determination of power circuit connectivity based on signal detection in a circuit. Signal data from the circuit gathered and a determination is made as to whether a signal of interest is present in the gathered signal data from the circuit using a statistical analysis of the gathered signal data. The statistical analysis comprises using a mean current value and statistical deviation of the current value of the signal data over a predetermined period of time to compute a confidence range. The confidence range is compared to a first threshold and a second threshold. A determination is made that the signal is present in response to the confidence range being above the first threshold. A determination is made that the signal is not present in response to the confidence range being below the second threshold.Type: ApplicationFiled: October 10, 2012Publication date: April 10, 2014Applicant: International Business Machines CorporationInventors: Wael R. El-Essawy, Alexandre P. Ferreira, Thomas W. Keller, JR., Sani R. Nassif, Karthick Rajamani, Juan C. Rubio
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Publication number: 20130054981Abstract: A mechanism is provided for dynamically changing power caps for a set of powered elements. Current being consumed by the set of powered elements P on a branch circuit is measured and available current on the branch circuit is determined. A new total power cap for a current time period t is identified based on a current total power cap and the measured current. A difference in total power caps (?TPC) is determined and, for each powered element p in the set of powered elements P at the current time period, a new power cap PC (p,t) is determined based on the previous power cap PC(p,t?1) and the difference of the total power caps to the set of powered elements P. A power cap of each powered element p is then dynamically set to the new power cap PC (p,t).Type: ApplicationFiled: August 23, 2011Publication date: February 28, 2013Applicant: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Thomas M. Brey, Wael R. El-Essawy, Alexandre P. Ferreira, Thomas W. Keller, JR.
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Publication number: 20130054985Abstract: A mechanism is provided for dynamically changing power caps for a set of powered elements. Current being consumed by the set of powered elements P on a branch circuit is measured and available current on the branch circuit is determined. A new total power cap for a current time period t is identified based on a current total power cap and the measured current. A difference in total power caps (?TPC) is determined and, for each powered element p in the set of powered elements P at the current time period, a new power cap PC (p,t) is determined based on the previous power cap PC(p,t?1.) and the difference of the total power caps to the set of powered elements P. A power cap of each powered element p is then dynamically set to the new power cap PC (p,t).Type: ApplicationFiled: August 21, 2012Publication date: February 28, 2013Applicant: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Thomas M. Brey, Wael R. El-Essawy, Alexandre P. Ferreira, Thomas W. Keller, JR.