Patents by Inventor Alexandre TORGUE

Alexandre TORGUE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Connection circuit for memory accesses
    Patent number: 12547566
    Abstract: A connection circuit couples a first circuit of a device to a bus configured to provide access to an addressable memory space of the device. The connection circuit receives an input address transmitted by the first circuit. The input address corresponds to an address in a first address range or a second address range of the addressable memory space. The addressable memory space further includes a third address range that is not addressable by the first circuit. The connection circuit compares the input address with a threshold address. In response to the comparison, the connection circuit generates a portion of an output address, the output address belonging to the second address range or the third address range of the addressable memory space. The portion of the output address is then supplied to the bus.
    Type: Grant
    Filed: January 18, 2024
    Date of Patent: February 10, 2026
    Assignee: STMicroelectronics International N.V.
    Inventors: Loic Pallardy, Alexandre Torgue
  • CONNECTION CIRCUIT FOR MEMORY ACCESSES
    Publication number: 20240248864
    Abstract: A connection circuit couples a first circuit of a device to a bus configured to provide access to an addressable memory space of the device. The connection circuit receives an input address transmitted by the first circuit. The input address corresponds to an address in a first address range or a second address range of the addressable memory space. The addressable memory space further includes a third address range that is not addressable by the first circuit. The connection circuit compares the input address with a threshold address. In response to the comparison, the connection circuit generates a portion of an output address, the output address belonging to the second address range or the third address range of the addressable memory space. The portion of the output address is then supplied to the bus.
    Type: Application
    Filed: January 18, 2024
    Publication date: July 25, 2024
    Applicant: STMicroelectronics International N.V.
    Inventors: Loic PALLARDY, Alexandre TORGUE