Abstract: A method for performing registration of multispectral retinal images. Corresponding cross-over points and bifurcation points of blood vessel in an eye are identified in a fixed image and in an offset image. The relative displacement of each point, between the images, is calculated. Based on these relative displacements, the offset of each pixel in the offset image is interpolated and the offset image is transformed into a corrected (distorted) image. Such an image can be used to assess the health of the eye. Further, a fixed image and a offset image of an eye are divided in a tile pattern. The relative displacement of each tile of the offset image with respect to the corresponding tile in the fixed image is calculated. An offset for each tile is calculated and the offset image is corrected as a function of those offsets.

Abstract: A method for performing registration of multispectral retinal images. Corresponding cross-over points and bifurcation points of blood vessel in an eye are identified in a fixed image and in an offset image. The relative displacement of each point, between the images, is calculated. Based on these relative displacements, the offset of each pixel in the offset image is interpolated and the offset image is transformed into a corrected (distorted) image. Such an image can be used to assess the health of the eye. Further, a fixed image and a offset image of an eye are divided in a tile pattern. The relative displacement of each tile of the offset image with respect to the corresponding tile in the fixed image is calculated. An offset for each tile is calculated and the offset image is corrected as a function of those offsets.

Abstract: A method, system, and apparatus use in locating a structure in an integrated circuit are provided. Electrical activities are induced in the IC for producing respective unique electromagnetic radiation patterns that collectively contain information on the location of the structure. The electromagnetic radiation patterns are detected, and an area of interest for locating the structure is determined from correlations in the electromagnetic radiation patterns. Once the area of interest is identified a user can more easily locate the structure on the integrated circuit by focusing on the area of interest.

Abstract: A process in a computer system for generating a high level schematic from a project schematic of basic components which comprises scanning the project schematic for a predetermined cell, wherein the cell is made up of a select group of components and their interconnections, and replacing the select group of components on every occurrence that it is found in the project schematic by a cell symbol having input and outputs to generate the high level schematic. The process may also be repeated for other predetermined cells which may be selected from a library or created by the user.

Abstract: A computer process for extracting logic gates and/or functional cells from a transistor netlist. The process comprises the steps of scanning the netlist for transistor blocks of p-type and n-type transistors, determining if the p-type transistors and the n-type transistors are complementary or non-complementary and identifying the logic gate for each of the complementary transistor blocks and/or the functional cell for each of the non-complementary blocks. A transistor block is a group of p-type transistors connected through their sources and drains between a power node and a common node, and a group n-type transistors connected through their sources and drains between a ground node and the common node. Complementarity may be determined by iteratively seeking the serial connections and the parallel connections for the p-type transistors and the n-type transistors, identifying the main p-type transistor branch and the main n-type transistor branch, and comparing the branches.

Abstract: A process in a computer system for generating a high level schematic from a project schematic of basic components which comprises scanning the project schematic for a predetermined cell, wherein the cell is made up of a select group of components and their interconnections, and replacing the select group of components on every occurrence that it is found in the project schematic by a cell symbol having input and outputs to generate the high level schematic. The process may also be repeated for other predetermined cells which may be selected from a library or created by the user.