Abstract: HfS3-based semiconductor devices that include a substrate layer, a substrate dielectric layer formed on the substrate layer, a bulk layer formed on the substrate dielectric layer, the bulk layer comprising as-synthesized n-type HfS3, and a p-type HfS3 layer formed on the bulk layer, wherein the p-type HfS3 comprises the two-dimensional hole gas (2DHG) layer. FET devices further include first and second electrodes located on the substrate dielectric layer and forming a semiconductor channel between the first and second electrodes.

Abstract: A gas sensor includes a sensing element including a substrate and a layer of carbon based nanostructures arranged on a surface of the substrate, wherein the carbon based nanostructures are arranged substantially perpendicular (e.g., at angles larger than 0 degrees) to the surface of the substrate, and wherein intercalation of a gas analyte between the carbon based nanostructures changes a conductivity of the layer of carbon-based nanostructures. The carbon-based nanostructures may include graphene nanoribbons (GNRs), laterally extended graphene nanoribbons (eGNRs), GNRs that comprise straight graphene nanoribbons, polycyclic aromatic hydrocarbons, or other graphene-based and graphene-related materials.

Abstract: A gas sensor includes a sensing element including a substrate and a layer of carbon based nanostructures arranged on a surface of the substrate, wherein the carbon based nanostructures are arranged substantially perpendicular (e.g., at angles larger than 0 degrees) to the surface of the substrate, and wherein intercalation of a gas analyte between the carbon based nanostructures changes a conductivity of the layer of carbon-based nanostructures. The carbon-based nanostructures may include graphene nanoribbons (GNRs), laterally extended graphene nanoribbons (eGNRs), GNRs that comprise straight graphene nanoribbons, polycyclic aromatic hydrocarbons, or other graphene-based and graphene-related materials.

Abstract: A ferroelectric random-access memory structure and processes for fabricating a ferroelectric random-access memory structure are described that includes using a molybdenum sulfide layer. In an implementation, a ferroelectric random-access memory structure in accordance with an exemplary embodiment includes at least one FeFET, which further includes a substrate; a back gate electrode formed on the substrate, the back gate electrode including a conductive layer; a gate dielectric substrate formed on the back gate electrode; a source electrode formed on the gate dielectric substrate; a drain electrode formed on the gate dielectric substrate; and a layered transition metal dichalcogenide disposed on the gate dielectric substrate and contacting the source electrode and the drain electrode.

Abstract: A method, computer, and computer program for displaying user screens within a hierarchical navigation scheme are provided. A method includes generating a navigation tree including a plurality of nodes, wherein each node is at least one of a link to a user screen, a pointer to at least one parent node, and a link to a script. The method also includes generating a navigation bar including a plurality of node navigation tool buttons and a current path including at least a first node button representative of a currently selected first node, generating a child bar including at least the first node button, and displaying the navigation bar and the child bar within a user interface.