Abstract: An insulation displacement terminal assembly comprises an insulation displacement terminal having a U-shaped insulation displacement portion which has two plate sections that are connected by a bight and insulation displacement slots that extend through the bight and down into the plate sections in aligned pairs of insulation piercing slot portions. A plurality of insulated electric cables are disposed in the insulation piercing slot portions and retained therein to form a sub-assembly. The sub-assembly is assembled into a slide-in insulator housing portion which has slots in its opposed side walls through which the insulated electric cables of the sub-assembly extend and a retention tongue that is cantilevered from a back wall of the housing portion and runs parallel to the slotted side walls to project between the insulated electric cables and the bight of the insulation displacement terminal to retain the electric cables down in the insulation displacement slot portions.

Abstract: A plurality of permanent magnet DC motors are grouped into two banks. One side of each motor in one bank is connected to a first common supply conductor while one side of each motor in the other bank is connected to a second common supply conductor. Independently operable switches are provided for connecting the other sides of respective ones of the motors in the first and second banks to a third common supply conductor. Three additional power switches are provided for reversibly connecting a source of potential across either bank of motors. By proper switch selection one or more motors in either of the banks may be operated in a selected direction of rotation.

Abstract: A noise tolerant time division multiplex system including a transmitter and receiver, each constructed as a monolithic integrated circuit and interconnected by a serial data wire. Data as well as power is supplied to the transmitter from a plurality of parallel connected input switches. The transmitter includes a parallel in/serial out shift register controlled by timing logic and further includes a tri-state driver for generating a three-level serial output signal indicative of the status of the input switches. The data is generated at a high rate to eliminate any deleterious effects of noise on the system. The receiver chip receives a regulated energizing potential from the transmitter chip over two additional wires, generates a timing signal from the three-level signal and loads the data in binary format into a serial in/parallel out shift register.