Abstract: A laser array for a large number of lasers which are manufactured on a single metal level is taught. Briefly stated the cavity length of the lasers are shortened so as to provide for metal lands or traces to be disposed adjacent to rear facets of the laser for eventual interconnection with pads. The diminution in cavity length does not degrade laser performance or characteristics, while performance and characteristics amongst adjacent lasers is similar.

Abstract: A semiconductor ridge waveguide laser having a high value of horizontal far-field wherein the laser structure includes a substrate, a first or lower cladding layer composed of a AlGaAs on the substrate, an acting layer on the lower cladding layer, and a second or upper cladding layer composed of AlGaAs on the active layer. The upper cladding layer includes a raised ridge portion formed by etching the upper cladding layer through a mask. A contact layer is disposed on top of the ridge portion. The aluminum mole concentration of the lower cladding layer is greater than the aluminum mole concentration of the upper cladding layer. This forces the optical mode towards the upper cladding layer and results in an increased lateral waveguide confinement that produces a high horizontal far-field.

Abstract: A heterojunction optical switch is taught. Briefly stated, birefringence in the form of a Pockel Cell is utilized such that biasing of the Pockel Cell permits the passage of light therethrough. Preferably, a light detector and resistor are electrically in parallel with the Pockel Cell such that light impinging upon the light detector causes the Pockel Cell to be reverse biased with the result that a separate light source may pass through the Pockel Cell. In this fashion, the Pockel Cell operates as a true optical switch.

Abstract: An improved field effect transistor device in a monocrystalline semiconductor body provided with source and drain regions and a gate electrode disposed over the channel between the source and drain regions wherein at least the drain region is formed of a first region where the impurity concentration increases with depth with the peak concentration being spaced inwardly from the major surface, and a second region located within the first region having a peak impurity concentration at the major surface. The drain region structure in operation promotes the current flow between the source and drain to flow deeper in the channel region and spaced from the gate dielectric layer.In the method for forming the field effect transistor, an impurity is introduced into the semiconductor body underlying at least the ultimate drain region, an epitaxial semiconductor layer deposited, and a second impurity region formed over the first region to form the drain contact.

Abstract: An improved field effect transistor device in a monocrystalline semiconductor body provided with source and drain regions and a gate electrode disposed over the channel between the source and drain regions wherein at least the drain region is formed of a first region where the impurity concentration increases with depth with the peak concentration being spaced inwardly from the major surface, and a second region located within the first region having a peak impurity concentration at the major surface. The drain region structure in operation promotes the current flow between the source and drain to flow deeper in the channel region and spaced from the gate dielectric layer.In the method for forming the field effect transistor, an impurity is introduced into the semiconductor body underlying at least the ultimate drain region, an epitaxial semiconductor layer deposited, and a second impurity region formed over the first region to form the drain contact.

Abstract: An improved field effect transistor device in a monocrystalline semiconductor body provided with source and drain regions and a gate electrode disposed over the channel between the source and drain regions wherein at least the drain region is formed of a first region where the impurity concentration increases with depth with the peak concentration being spaced inwardly from the major surface, and a second region located within the first region having a peak impurity concentration at the major surface. The drain region structure in operation promotes the current flow between the source and drain to flow deeper in the channel region and spaced from the gate dielectric layer.In the method for forming the field effect transistor, an impurity is introduced into the semiconductor body underlying at least the ultimate drain region, an epitaxial semiconductor layer deposited, and a second impurity region formed over the first region to form the drain contact.