Abstract: A composite differential Radio Frequency (RF) power amplifier includes a plurality of differential RF cascode power amplifiers coupled in parallel. Each differential RF cascode power amplifier includes a positive transconductance stage and a positive cascode stage coupled in series with the positive transconductance stage between a voltage node and ground. Each also includes a negative transconductance stage and a negative cascode stage coupled in series with the negative transconductance stage between the voltage node and ground.

Abstract: Bias circuitry that may be used within a communications or other device includes a first current mirror having first and second transistors with sources coupled to ground and operable to receive a reference current at a drain of first transistor. A second current mirror has first and second transistors with drains coupled to a battery voltage supply. A third current mirror has first and second transistors with drains coupled to sources of the first and second transistors of the second current mirror, respectively. A biasing transistor couples between the second transistor of the first current mirror and the first transistor of the third current mirror and operable to receive a tuning input voltage at its gate. A resistive element coupled between the second transistor of the third current mirror and ground produces a bias voltage produced at a connection of the resistive element and the second transistor of the third current mirror.

Abstract: A composite differential Radio Frequency (RF) power amplifier includes a plurality of differential RF cascode power amplifiers coupled in parallel. Each differential RF cascode power amplifier includes a positive transconductance stage and a positive cascode stage coupled in series with the positive transconductance stage between a voltage node and ground. Each also includes a negative transconductance stage and a negative cascode stage coupled in series with the negative transconductance stage between the voltage node and ground.

Abstract: A Radio Frequency (RF) cascode power amplifier operates with differing battery supply voltages. A transconductance stage has a transistor with an RF signal input at its gate. A cascode stage has at least one cascode transistor, the cascode stage coupled in series with the transconductance stage between a battery voltage node and ground, the cascode stage having an RF signal output at the battery voltage node and at least one bias input to the at least one cascode transistor. Cascode bias feedback circuitry applies fixed bias voltage(s) to the at least one two bias inputs for a low battery voltage and applies feedback bias voltage(s) to the at least two bias inputs for a high battery voltage, the feedback bias voltage(s) based upon a voltage of the battery voltage node. More than two differing battery supply voltages are supported.

Abstract: Aspects of a method and system for enhancing efficiency by modulating power amplifier (PA) gain are presented. Aspects of the system may comprise a PA gain modulator that enables modification of an amplitude of a digital baseband signal. A baseband processor may enable computation of a first gain value based on the modification. The baseband processor may enable computation of a second gain value based on the first gain value. A PA may enable generation of an RF output signal based on the modified digital baseband signal and the second gain value.

Abstract: A radio frequency (RF) front-end includes a plurality of power amplifier modules and a plurality of impedance matching circuits. Each of the plurality of impedance matching circuits includes an input connection and an output connection, wherein outputs of the plurality of power amplifier modules are coupled to corresponding input connections of the plurality of impedance matching circuits to provide a desired loading of the plurality of power amplifier modules and wherein the output connections of the plurality of impedance matching circuits are coupled together to add power of the plurality of power amplifiers.

Abstract: An integrated circuit radio transceiver includes a phase shift block that is operable to produce a phase shifted current signal at an output of the phase shift block and a mixer with a low input impedance that is operable to produce a phase and frequency shifted output current signal based upon the phase shifted current signal. One aspect of the present invention is that the phase shift block produces an output as a current signal and the mixer block is operably disposed and formed to receive the current signal produced by the phase shift block. Similarly, an operational amplifier configured in a low input impedance mode is provided to receive and amplify a current signal mixer output, all to maximize signal processing head room reduce circuit noise and improve linearity.

Abstract: An integrated circuit radio transceiver comprises an integrated phase shift mixer for generating a phase and frequency shifted output signal to at least a portion of one of a transmitter or receiver front end. The integrated phase shift mixer includes a phase shift block that is operable to produce a phase shifted current signal at an output of the phase shift block and a mixer that is operable to produce the phase and frequency shifted output signal based upon the phase shifted current signal. One aspect of the present invention is that the phase shift block produces an output as a current signal and the mixer block is operably disposed and formed to receive the current signal produced by the phase shift block. Thus, the mixer includes a folded cascode mixer that provides a substantially low input impedance.

Abstract: Aspects of a method and system for a highly efficient power amplifier (PA) utilizing dynamic biasing and predistortion are presented. Aspects of the system may include a processor that enables computation of a value of a variable bias component of a bias current based on a bias slope value and an amplitude of an envelope input signal. The processor may enable computation of a value of the bias current based on the selected constant bias current component value and the variable bias current component value. A PA may enable generation of an output signal in response to a generated baseband signal by utilizing the bias current to amplify an amplifier input signal. The bias current may be generated based on the envelope input signal. A feedback signal may be generated based on the output signal, which may be used to predistort a subsequent baseband signal.

Abstract: A radio frequency (RF) front-end includes a plurality of power amplifier modules and a plurality of impedance matching circuits. Each of the plurality of impedance matching circuits includes an input connection and an output connection, wherein outputs of the plurality of power amplifier modules are coupled to corresponding input connections of the plurality of impedance matching circuits to provide a desired loading of the plurality of power amplifier modules and wherein the output connections of the plurality of impedance matching circuits are coupled together to add power of the plurality of power amplifiers.

Abstract: Aspects of a method and system for a highly efficient power amplifier (PA) utilizing dynamic biasing and predistortion are presented. Aspects of the system may include a processor that enables computation of a value of a variable bias component of a bias current based on a bias slope value and an amplitude of an envelope input signal. The processor may enable computation of a value of the bias current based on the selected constant bias current component value and the variable bias current component value. A PA may enable generation of an output signal in response to a generated baseband signal by utilizing the bias current to amplify an amplifier input signal. The bias current may be generated based on the envelope input signal. A feedback signal may be generated based on the output signal, which may be used to predistort a subsequent baseband signal.

Abstract: Aspects of a method and system for compensating for estimated distortion in a transmitter by utilizing a digital predistortion scheme with a single feedback mixer are presented. Aspects of the system may include at least one circuit that enables generation of an output signal in response to one or more generated input signals. A feedback signal may be generated within a single feedback mixer circuit that may perform a frequency mix-down operation on the generated output signal. The generated feedback signal may be inserted at one or more insertion points in a receiver. Each of the insertion points may be located between a mixer stage of the receiver, and one or more circuits that generate a baseband signal based on the generated feedback signal.

Abstract: Aspects of a method and system for enhancing efficiency by modulating power amplifier (PA) gain are presented. Aspects of the system may comprise a PA gain modulator that enables modification of an amplitude of a digital baseband signal. A baseband processor may enable computation of a first gain value based on the modification. The baseband processor may enable computation of a second gain value based on the first gain value. A PA may enable generation of an RF output signal based on the modified digital baseband signal and the second gain value.

Abstract: Aspects of a method and system for enhancement of power amplifier (PA) efficiency through controlled variation of gain in a power amplifier driver are presented. Aspects of the system may comprise an envelope detector that enables detection of an amplitude of an analog input signal. The envelope detector may enable computation of a first gain value based on the detection. A second gain value may be computed based on the first gain value. A PA may enable generation of an analog output signal based on the analog input signal, the first gain value and the second gain value.

Abstract: Aspects of a method and system for signal processing are disclosed and may include receiving a plurality of wireless signals via a plurality of M receive antennas. Each of M phase shifters coupled to each of the M receive antennas may be set to operate in a bypass mode or with an arbitrary phase setting. Corresponding signal strengths of M signals generated when each of the M phase-shifters is coupled to each of the M receive antennas may be measured, while at least a portion of the M receive antennas are turned off. Selecting one of the M generated signals for processing without the use of an antenna switch, based on the measured signal strength. A signal strength of each of the generated M amplified signals may be measured while turning off at least one of the plurality of M receive antennas and without the use of the phase-shifters.

Abstract: Various aspect of a system for a linearized transmitter including a power amplifier may include at least one transconductance amplifier that enables generation of a single analog quadrature signal. Transmitter mixers may enable generation of a plurality of upconverted RF signals in a corresponding plurality of RF processing chains based on the generated single analog quadrature signal. In various embodiments of the invention, a gain stage, for example gain stage, may also be referred to as an RF processing chain. Power amplifier circuit may enable generation of a corresponding plurality of RF output signals within a wireless communication system based on the generated plurality of upconverted RF signals.

Abstract: A radio frequency (RF) phase shifter having an RC-CR circuit that includes a first capacitor having a first capacitor node and a second capacitor node and a first resistor coupled between the first capacitor node and a ground. The RC-CR circuit also includes a second resistor having a first resistor node and a second resistor node and a second capacitor coupled between the first resistor node and the ground. The RF phase shifter generates arbitrary phase shift by using a scheme of adding two perpendicular vectors with variable gains (or amplitudes).

Abstract: A radio frequency (RF) phase shifter having an RC-CR circuit that includes a first capacitor having a first capacitor node and a second capacitor node and a first resistor coupled between the first capacitor node and a ground. The RC-CR circuit also includes a second resistor having a first resistor node and a second resistor node and a second capacitor coupled between the first resistor node and the ground. The RF phase shifter generates arbitrary phase shift by using a scheme of adding two perpendicular vectors with variable gains (or amplitudes).

Abstract: An integrated circuit radio transceiver comprises an integrated phase shift mixer for generating a phase and frequency shifted output signal to at least a portion of one of a transmitter or receiver front end. The integrated phase shift mixer includes a phase shift block that is operable to produce a phase shifted current signal at an output of the phase shift block and a mixer that is operable to produce the phase and frequency shifted output signal based upon the phase shifted current signal. One aspect of the present invention is that the phase shift block produces an output as a current signal and the mixer block is operably disposed and formed to receive the current signal produced by the phase shift block. Thus, the mixer includes a folded cascode mixer that provides a substantially low input impedance.

Abstract: An integrated circuit radio transceiver includes a phase shift block that is operable to produce a phase shifted current signal at an output of the phase shift block and a mixer with a low input impedance that is operable to produce a phase and frequency shifted output current signal based upon the phase shifted current signal. One aspect of the present invention is that the phase shift block produces an output as a current signal and the mixer block is operably disposed and formed to receive the current signal produced by the phase shift block.