Abstract: A solid state impedance tuner or impedance tuner system including a housing structure and at least two solid state tuner modules electrically combined and disposed in one package within the housing structure. Each tuner module includes at least one solid state control element. Another embodiment is directed to an impedance tuner module card configured in a standardized system architecture. The card includes a chassis board, and at least one solid state tuner module integrated on the card and supported on or by the chassis board, each module including at least one solid state control element. Methods for calibrating a solid state impedance tuner that includes at least two solid state tuner modules combined in one package are disclosed.

Abstract: A solid state impedance tuner or impedance tuner system including a housing structure and at least two solid state tuner modules electrically combined and disposed in one package within the housing structure. Each tuner module includes at least one solid state control element. Another embodiment is directed to an impedance tuner module card configured in a standardized system architecture. The card includes a chassis board, and at least one solid state tuner module integrated on the card and supported on or by the chassis board, each module including at least one solid state control element. Methods for calibrating a solid state impedance tuner that includes at least two solid state tuner modules combined in one package are disclosed.

Abstract: A solid state impedance tuner or impedance tuner system includes a control element array with a plurality of solid state control elements configured to be turned on simultaneously to achieve a desired impedance state. The control element array comprises N solid state control elements arranged along an RF transmission line. A controller selectively turns on or off each control element by application of a control signal to vary an impedance presented by the control element array, Another aspect is an impedance tuner module card configured in a standardized system architecture, with a chassis board, and at least one solid state tuner module integrated on the card A chassis electrical connector connected to the tuner module is configured for connection to a corresponding backplane connector. Methods for calibrating a solid state impedance tuner that includes at least two solid state tuner modules combined in one package are disclosed.

Abstract: A solid state impedance tuner or impedance tuner system including a housing structure and at least two solid state tuner modules electrically combined and disposed in one package within the housing structure. Each tuner module includes at least one solid state control element. Another embodiment is directed to an impedance tuner module card configured in a standardized system architecture. The card includes a chassis board, and at least one solid state tuner module integrated on the card and supported on or by the chassis board, each module including at least one solid state control element. Methods for calibrating a solid state impedance tuner that includes at least two solid state tuner modules combined in one package are disclosed.

Abstract: A method and apparatus for calibrating a multiport measurement path using through, high reflect and line calibration standards presents the through standard between no more than N?1 other pairs of measurement ports where at least one of the other pairs is a proximal pair.

Abstract: A method and apparatus for calibrating a measurement path of 2N measurement ports comprises presenting a high reflect calibration standard at each measurement port and measuring a reflection characteristic for each measurement port, presenting a line calibration standard and a through calibration standard between each one of N direct pairs of the measurement ports and measuring forward and reverse reflection and transmission responses and calculating a load match error coefficient for each measurement port, and presenting only the through calibration standard between indirect pairs of measurement ports and calculating the forward and reverse transmission tracking for each indirect pairs of measurement ports.

Abstract: A method of calibrating a measurement path of a vector network analyzer having at least two reference receivers, and a total of 2N measurement ports, where N is an integer comprises the steps of presenting a high reflect calibration standard at each measurement port and measuring a reflection characteristic for each measurement port. The method further comprises the steps of presenting a line calibration standard and a through calibration standard is presented between N direct pairs of the measurement ports and measuring reflection and transmission responses to each standard. From these measurements, the method calculates directivity, source match, and reflection tracking error coefficients for each one of the measurement ports.