Patents by Inventor Ali Hassanzadeh

Ali Hassanzadeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11685680
    Abstract: A system and method for collecting and purifying rainwater. The system includes a humidifier including a heat exchanger for preheating collected rainwater. The preheated water is output to a heater. The heater heats the water to between about 80 degrees C. and about 100 degrees C. The humidifier also includes a nozzle coupled to an outlet of the heater. The nozzle injects water vapor into the humidifier. The humidifier also includes a fan capable of circulating the water vapor in an inner volume of the humidifier. The water vapor condenses on an outer surface of the heat exchanger. The system also includes a collector for collecting the condensed potable water from the outer surface of the heat exchanger and a delivery system for delivering the potable water.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: June 27, 2023
    Inventors: Ali Hassanzadeh, Justin Hicks
  • Patent number: 11479480
    Abstract: Apparatuses for removal of solids from water comprising a heater for heating an immiscible liquid (IL), a humidifier having porous sheets allowing direct contact between the IL and water, thereby separating the solids by evaporating the water into cool dry air flowing past the porous sheets, and a dehumidifier comprising porous sheets that allow direct contact between the cool IL and hot moist air flowing past the porous sheets, thereby condensing fresh water from the moist air. Also disclosed are methods for removal of solids from water by heating an IL, distributing the IL to porous sheets in a humidifier, distributing water with dissolved solids to the porous sheets, separating the solids from the water by evaporating the water into dry air flowing past the porous sheets, and condensing fresh water by flowing the moist air past porous sheets in a dehumidifier having cool IL distributed to the porous sheets.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: October 25, 2022
    Assignee: The Regents of the University of California
    Inventors: James Palko, Ali Hassanzadeh
  • Publication number: 20220073373
    Abstract: Apparatuses for removal of solids from water comprising a heater for heating an immiscible liquid (IL), a humidifier having porous sheets allowing direct contact between the IL and water, thereby separating the solids by evaporating the water into cool dry air flowing past the porous sheets, and a dehumidifier comprising porous sheets that allow direct contact between the cool IL and hot moist air flowing past the porous sheets, thereby condensing fresh water from the moist air. Also disclosed are methods for removal of solids from water by heating an IL, distributing the IL to porous sheets in a humidifier, distributing water with dissolved solids to the porous sheets, separating the solids from the water by evaporating the water into dry air flowing past the porous sheets, and condensing fresh water by flowing the moist air past porous sheets in a dehumidifier having cool IL distributed to the porous sheets.
    Type: Application
    Filed: October 31, 2019
    Publication date: March 10, 2022
    Applicant: The Regents of the University of California
    Inventors: James PALKO, Ali HASSANZADEH
  • Publication number: 20210363046
    Abstract: A system and method for collecting and purifying rainwater. The system includes a humidifier including a heat exchanger for preheating collected rainwater. The preheated water is output to a heater. The heater heats the water to between about 80 degrees C. and about 100 degrees C. The humidifier also includes a nozzle coupled to an outlet of the heater. The nozzle injects water vapor into the humidifier. The humidifier also includes a fan capable of circulating the water vapor in an inner volume of the humidifier. The water vapor condenses on an outer surface of the heat exchanger. The system also includes a collector for collecting the condensed potable water from the outer surface of the heat exchanger and a delivery system for delivering the potable water.
    Type: Application
    Filed: August 5, 2021
    Publication date: November 25, 2021
    Inventors: Ali Hassanzadeh, Justin Hicks
  • Publication number: 20210147271
    Abstract: A system and method for collecting and purifying rainwater. The system includes a humidifier including a heat exchanger for preheating collected rainwater. The preheated water is output to a heater. The heater heats the water to between about 80 degrees C. and about 100 degrees C. The humidifier also includes a nozzle coupled to an outlet of the heater. The nozzle injects water vapor into the humidifier. The humidifier also includes a fan capable of circulating the water vapor in an inner volume of the humidifier. The water vapor condenses on an outer surface of the heat exchanger. The system also includes a collector for collecting the condensed potable water from the outer surface of the heat exchanger and a delivery system for delivering the potable water.
    Type: Application
    Filed: November 18, 2019
    Publication date: May 20, 2021
    Inventors: Ali Hassanzadeh, Justin Hicks
  • Patent number: 6794581
    Abstract: A system and method for distributing power to an integrated circuit. In one embodiment, a power laminate may be mounted to a printed circuit board (PCB). The integrated circuit for which power is to be distributed may be electrically coupled to the PCB. The power laminate may include one or more power planes and one or more reference (i.e. ground) planes, with each pair of power/reference planes separated by a dielectric layer. The power laminate may also include a connector or other means for receiving power from an external power source. The power laminate may be electrically coupled to the integrated circuit, thereby enabling it to provide power to the integrated circuit. The PCB may include a signal layer for conveying signals to and from the integrated circuit, but does not include any means for providing core power to the integrated circuit. Thus, all core power provided to the integrated circuit may be supplied by the power laminate.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: September 21, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Larry D. Smith, Istvan Novak, Michael C. Freda, Ali Hassanzadeh
  • Patent number: 6760232
    Abstract: A system and method for distributing power to an integrated circuit. In one embodiment, a power laminate may be mounted to a printed circuit board (PCB). The integrated circuit for which power is to be distributed may be electrically coupled to the PCB. The power laminate may include one or more power planes and one or more reference (i.e. ground) planes, with each pair of power/reference planes separated by a dielectric layer. The power laminate may also include a connector or other means for receiving power from an external power source. The power laminate may be electrically coupled to the integrated circuit, thereby enabling it to provide core power to the integrated circuit. The power laminate may also include a voltage regulator circuit, and a plurality of decoupling capacitors. In one embodiment, the power laminate may include a plurality of apertures which allow for the passing of connections between the integrated circuit and the PCB.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: July 6, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Larry D. Smith, Michael C. Freda, Ali Hassanzadeh
  • Patent number: 6534872
    Abstract: An apparatus and system comprising electrical interconnection devices (EIDs), such as printed wiring boards, semiconductor packages, and printed circuit boards, having novel via and signal trace positioning. The vias may be positioned off-center from the pattern of the surface pads. Via groups, or staircase vias, connect surface pads with vias extending into the electrical interconnection device. The via groups convert the pad geometry on the surface to a more open via pattern on one or more internal layers. The EID comprises a plurality of pads formed on a surface for providing electrical connections to another EID. A plurality of vias each extend from a corresponding pad to another layer of the printed wiring board. Each via is offset from a central location of its corresponding pad.
    Type: Grant
    Filed: August 10, 1999
    Date of Patent: March 18, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Michael C. Freda, Han Y. Ko, Ali Hassanzadeh
  • Patent number: 6520805
    Abstract: A memory module with offset notches for improved insertion and a memory module connector for mating thereto. The connector housing includes an accommodating s space for receiving a portion of the memory module printed circuit board (PCB). A first key is disposed within the accommodating space of the housing and is positioned between the first end and the center of the housing. A second key is flirter disposed within the accommodating space and is positioned between the second end of the housing and the center. A distance between the first key and the second key is greater than 40% of the length of the housing. Either the first, second, or both keys may extend from the accommodating space beyond a top plane defined by a top side of the accommodating space of the housing. The memory module comprises the PCB with a first notch positioned between the first end of the PCB and the center of the PCB. A second notch is positioned between the second end of the PCB and the center of the PCB.
    Type: Grant
    Filed: October 3, 2001
    Date of Patent: February 18, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Ali Hassanzadeh, Victor Odisho
  • Publication number: 20020131256
    Abstract: A system and method for distributing power to an integrated circuit. In one embodiment, a power laminate may be mounted to a printed circuit board (PCB). The integrated circuit for which power is to be distributed may be electrically coupled to the PCB. The power laminate may include one or more power planes and one or more reference (i.e. ground) planes, with each pair of power/reference planes separated by a dielectric layer. The power laminate may also include a connector or other means for receiving power from an external power source. The power laminate may be electrically coupled to the integrated circuit, thereby enabling it to provide core power to the integrated circuit. The power laminate may also include a voltage regulator circuit, and a plurality of decoupling capacitors. In one embodiment, the power laminate may include a plurality of apertures which allow for the passing of connections between the integrated circuit and the PCB.
    Type: Application
    Filed: March 16, 2001
    Publication date: September 19, 2002
    Inventors: Larry D. Smith, Michael C. Freda, Ali Hassanzadeh
  • Publication number: 20020129974
    Abstract: A system and method for distributing power to an integrated circuit. In one embodiment, a power laminate may be mounted to a printed circuit board (PCB). The integrated circuit for which power is to be distributed may be electrically coupled to the PCB. The power laminate may include one or more power planes and one or more reference (i.e. ground) planes, with each pair of power/reference planes separated by a dielectric layer. The power laminate may also include a connector or other means for receiving power from an external power source. The power laminate may be electrically coupled to the integrated circuit, thereby enabling it to provide power to the integrated circuit. The PCB may include a signal layer for conveying signals to and from the integrated circuit, but does not include any means for providing core power to the integrated circuit. Thus, all core power provided to the integrated circuit may be supplied by the power laminate.
    Type: Application
    Filed: March 16, 2001
    Publication date: September 19, 2002
    Inventors: Larry D. Smith, Istvan Novak, Michael C. Freda, Ali Hassanzadeh
  • Patent number: 6428360
    Abstract: A memory module with offset notches for improved insertion and a memory module connector for mating thereto. The connector housing includes an accommodating space for receiving a portion of the memory module printed circuit board (PCB). A first key is disposed within the accommodating space of the housing and is positioned between the first end and the center of the housing. A second key is further disposed within the accommodating space and is positioned between the second end of the housing and the center. A distance between the first key and the second key is greater than 40% of the length of the housing. Either the first, second, or both keys may extend from the accommodating space beyond a top plane defined by a top side of the accommodating space of the housing. The memory module comprises the PCB with a first notch positioned between the first end of the PCB and the center of the PCB. A second notch is positioned between the second end of the PCB and the center of the PCB.
    Type: Grant
    Filed: January 4, 2001
    Date of Patent: August 6, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Ali Hassanzadeh, Victor Odisho
  • Publication number: 20020019170
    Abstract: A memory module with offset notches for improved insertion and a memory module connector for mating thereto. The connector housing includes an accommodating s space for receiving a portion of the memory module printed circuit board (PCB). A first key is disposed within the accommodating space of the housing and is positioned between the first end and the center of the housing. A second key is flirter disposed within the accommodating space and is positioned between the second end of the housing and the center. A distance between the first key and the second key is greater than 40% of the length of the housing. Either the first, second, or both keys may extend from the accommodating space beyond a top plane defined by a top side of the accommodating space of the housing. The memory module comprises the PCB with a first notch positioned between the first end of the PCB and the center of the PCB. A second notch is positioned between the second end of the PCB and the center of the PCB.
    Type: Application
    Filed: October 3, 2001
    Publication date: February 14, 2002
    Applicant: Sun Microsystems, Inc
    Inventors: Ali Hassanzadeh, Victor Odisho
  • Patent number: 6315614
    Abstract: A memory module with offset notches for improved insertion and a memory module connector for mating thereto. The connector housing includes an accommodating space for receiving a portion of the memory module printed circuit board (PCB). A first key is disposed within the accommodating space of the housing and is positioned between the first end and the center of the housing. A second key is further disposed within the accommodating space and is positioned between the second end of the housing and the center. A distance between the first key and the second key is greater than 40% of the length of the housing for stability of the memory module while encased by the housing. Either the first, second, or both keys may extend from the accommodating space beyond a top plane defined by a top side of the accommodating space of the housing. The memory module comprises the PCB with a first notch positioned between the first end of the PCB and the center of the PCB.
    Type: Grant
    Filed: April 16, 1999
    Date of Patent: November 13, 2001
    Assignee: Sun Microsystems, Inc.
    Inventors: Ali Hassanzadeh, Victor Odisho
  • Patent number: D633877
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: March 8, 2011
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Stephen Heng, Mahesh Hardikar, Ali Hassanzadeh, Sanjay Dandia
  • Patent number: D633878
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: March 8, 2011
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Stephen Heng, Ali Hassanzadeh, Mahesh Hardikar, Srikumar Seshasayee
  • Patent number: D633880
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: March 8, 2011
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Stephen Heng, Ali Hassanzadeh, Mahesh Hardikar, Sanjay Dandia
  • Patent number: D645426
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: September 20, 2011
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Stephen Heng, Mahesh Hardikar, Ali Hassanzadeh, Sanjay Dandia
  • Patent number: D648688
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: November 15, 2011
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Stephen Heng, Ali Hassanzadeh, Mahesh Hardikar, Sanjay Dandia
  • Patent number: D661667
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: June 12, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Stephen Heng, Mahesh Hardikar, Ali Hassanzadeh, Sanjay Dandia