Patents by Inventor Ali Javadiabhari

Ali Javadiabhari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230409938
    Abstract: A method for validation and runtime estimation of a quantum algorithm includes receiving a quantum algorithm and simulating the quantum algorithm, the quantum algorithm forming a set of quantum gates. The method further includes analyzing a first set of parameters of the set of quantum gates and analyzing a second set of parameters of a set of qubits performing the set of quantum gates. The method further includes transforming, in response to determining at least one of the first set of parameters or the second set of parameters meets an acceptability criterion, the quantum algorithm into a second set of quantum gates.
    Type: Application
    Filed: October 28, 2022
    Publication date: December 21, 2023
    Applicant: International Business Machines Corporation
    Inventors: Ali Javadiabhari, Jay M. Gambetta, Ismael Faro Sertage, Paul Nation
  • Patent number: 11829842
    Abstract: Techniques for enhancing quantum circuit execution in a quantum service are presented. Database component stores compiled unitaries associated with quantum functions. Unitary management component (UMC) determines whether to compile a unitary associated with a quantum function for storage in the database component based on a composite quality score associated with the unitary and a threshold composite quality score associated with the quantum function, wherein the threshold score can be, or can be based on, a composite quality score of a compiled unitary that performs the same quantum function or a compiled unitary that performs a different quantum function. UMC determines the composite quality score based on a group of factors comprising frequency of utilizing the quantum function or equivalent quantum function or computation, age of the quantum function or computation, difficulty level of compiling a unitary, quantum circuit quality, or error associated with experimental execution of the quantum function.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: November 28, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ali Javadiabhari, Dmitri Maslov
  • Patent number: 11775854
    Abstract: Systems, computer-implemented methods, and computer program products to facilitate characterizing crosstalk of a quantum computing system based on sparse data collection are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a package component that packs subsets of quantum gates in a quantum device into one or more bins. The computer executable components can further comprise an assessment component that characterizes crosstalk of the quantum device based on a number of the one or more bins into which the subsets of quantum gates are packed.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: October 3, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Prakash Murali, Ali Javadiabhari, David C. Mckay
  • Publication number: 20230289638
    Abstract: A method for a classical computer to synthesize a quantum circuit for use on a quantum computational device includes receiving information for a target operation to be implemented on said quantum computational device, and receiving information regarding native qubit gates that are available on said quantum computational device to be used to implement said quantum circuit; The method further includes determining each of a plurality of quantum circuits formed from said native qubit gates such that each of said plurality of quantum circuits will perform a function substantially equivalent to said target operation when implemented on the quantum computational device. The method further includes selecting one of said plurality of quantum circuits formed from said native qubit gates, based on a performance criterion of said quantum computational device.
    Type: Application
    Filed: June 22, 2022
    Publication date: September 14, 2023
    Inventors: Eric Peterson, Lev Samuel Bishop, Ali Javadiabhari
  • Publication number: 20230169379
    Abstract: A quantum circuit generator for a quantum computer includes a controller; and a plurality of analog conversion units (ACUs) operatively connected to the controller, each ACU being operatively connected to a corresponding qubit of a plurality of qubits, wherein each ACU is configured to convert a digital input from the controller into an analog input at a microwave frequency to control a quantum state of the corresponding qubit. The controller is configured to generate a quantum circuit using at least two qubits of the plurality of qubits, the at least two qubits being selected by the controller based on corresponding classical bits being mapped by the controller and based on latency of the generated quantum circuit so that the generated quantum circuit has a latency less than a threshold latency.
    Type: Application
    Filed: October 21, 2022
    Publication date: June 1, 2023
    Inventors: Ali Javadiabhari, Scott Douglas Lekuch, Ken Inoue
  • Patent number: 11657196
    Abstract: A method includes detecting submission of a first quantum circuit for compilation, the first quantum circuit comprising a first set of quantum logic gates; generating a first gate index, the first gate index comprising an ordered table of a subset of the set of quantum logic gates, each quantum logic gate of the subset of quantum logic gates including a corresponding set of qubits acted on by the quantum logic gate; comparing the first gate index with a second gate index to determine a structural equality of the first quantum circuit and the second quantum circuit; and parameterizing, in response to determining a structural equality of the first quantum circuit and the second quantum circuit, a first set of parameters of a second set of quantum logic gates of the second quantum circuit with a second set of parameters of the first set of quantum logic gates.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: May 23, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Don Greenberg, Marco Pistoia, Ali Javadiabhari, Richard Chen, Jay M. Gambetta
  • Publication number: 20230153679
    Abstract: Systems and techniques that facilitate backend quantum runtimes are provided. In various embodiments, a system can comprise a memory that can store computer-executable components. The system can further comprise a processor that can be operably coupled to the memory and that can execute the computer-executable components stored in the memory. In various embodiments, the computer-executable components can comprise an execution orchestration engine component that can parse a computer program into classical and quantum portions and that can host the computer program by instantiating a classical computing resource.
    Type: Application
    Filed: June 21, 2022
    Publication date: May 18, 2023
    Inventors: Michael Behrendt, Ismael Faro Sertage, Lev Samuel Bishop, Jay Michael Gambetta, Renier Morales, Ali Javadiabhari, Seetharami R. Seelam, Blake Robert Johnson
  • Patent number: 11645132
    Abstract: A method includes executing a calibration operation on a set of qubits, in a first iteration, to produce a set of parameters, a first subset of the set of parameters corresponding to a first qubit of the set of qubits, and a second subset of the set of parameters corresponding to a second qubit of the set of qubits. In an embodiment, the method includes selecting the first qubit, responsive to a parameter of the first subset meeting an acceptability criterion. In an embodiment, the method includes forming a quantum gate, responsive to a second parameter of the second subset failing to meet a second acceptability criterion, using the first qubit and a third qubit.
    Type: Grant
    Filed: October 11, 2021
    Date of Patent: May 9, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ali Javadiabhari, Jay M. Gambetta, Andrew W. Cross, David C. Mckay
  • Patent number: 11645203
    Abstract: Techniques facilitating cached result use through quantum gate rewrite are provided. In one example, a computer-implemented method comprises converting, by a device operatively coupled to a processor, an input quantum circuit to a normalized form, resulting in a normalized quantum circuit; detecting, by the device, a match between the normalized quantum circuit and a cached quantum circuit among a set of cached quantum circuits; and providing, by the device, a cached run result of the cached quantum circuit based on the detecting.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: May 9, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John A. Gunnels, Mark Wegman, David Kaminsky, Jay M. Gambetta, Ali Javadiabhari, David C. Mckay
  • Publication number: 20230051437
    Abstract: Systems, computer-implemented methods and/or computer program products are provided to facilitate operation of a quantum circuit on a set of qubits via providing and implementing decompositions of one or more unitary matrices. According to an embodiment, a system can implement a unitary matrix by providing and implementing a decomposition of the unitary matrix, to thereby facilitate operation of and/or operate a quantum circuit on a set of qubits. The system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a unitary matrix management component that decomposes a defined 4×4 unitary matrix into a defined circuit comprising a sequence of universal gates. The sequence of universal gates can be a same sequence for each defined 4×4 unitary matrix of a set of candidate 4×4 unitary matrices including the defined 4×4 unitary matrix.
    Type: Application
    Filed: August 12, 2021
    Publication date: February 16, 2023
    Inventor: Ali Javadiabhari
  • Patent number: 11580433
    Abstract: A method for validation and runtime estimation of a quantum algorithm includes receiving a quantum algorithm and simulating the quantum algorithm, the quantum algorithm forming a set of quantum gates. The method further includes analyzing a first set of parameters of the set of quantum gates and analyzing a second set of parameters of a set of qubits performing the set of quantum gates. The method further includes transforming, in response to determining at least one of the first set of parameters or the second set of parameters meets an acceptability criterion, the quantum algorithm into a second set of quantum gates.
    Type: Grant
    Filed: March 9, 2019
    Date of Patent: February 14, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ali Javadiabhari, Jay M. Gambetta, Ismael Faro Sertage, Paul Nation
  • Patent number: 11537925
    Abstract: A quantum circuit generator for a quantum computer includes a controller; and a plurality of analog conversion units (ACUs) operatively connected to the controller, each ACU being operatively connected to a corresponding qubit of a plurality of qubits, wherein each ACU is configured to convert a digital input from the controller into an analog input at a microwave frequency to control a quantum state of the corresponding qubit. The controller is configured to generate a quantum circuit using at least two qubits of the plurality of qubits, the at least two qubits being selected by the controller based on corresponding classical bits being mapped by the controller and based on latency of the generated quantum circuit so that the generated quantum circuit has a latency less than a threshold latency.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: December 27, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ali Javadiabhari, Scott D. Lekuch, Ken Inoue
  • Publication number: 20220237489
    Abstract: Techniques regarding superconducting quantum processor architectures and/or VQE compiler optimizations are provided. For example, one or more embodiments described herein can regard an apparatus comprising a superconducting quantum processor topology that employs an X-tree architecture to delineate connections between superconducting qubits. Also, a total number of the connections can be less than a total number of the superconducting qubits.
    Type: Application
    Filed: January 27, 2021
    Publication date: July 28, 2022
    Inventors: Gushu Li, Ali Javadiabhari
  • Publication number: 20220229956
    Abstract: A repository is configured in a hybrid data processing environment comprising a classical computing system and a quantum computing system, to hold a plurality of quantum circuit components (QCC(s)). A degree of difficulty in simulating the received QCC in the classical computing system is transformed into a classical hardness score. A degree of difficulty in implementing the received QCC in the quantum computing system is transformed into a quantum hardness score. A first parameter in a metadata data structure associated with the received QCC is populated with the classical hardness score. A second parameter in the metadata data structure associated with the received QCC is populated with the quantum hardness score. The received QCC is transformed into a library element by at least augmenting the received QCC with the metadata data structure. The library element is added to the repository.
    Type: Application
    Filed: April 7, 2022
    Publication date: July 21, 2022
    Applicant: International Business Machines Corporation
    Inventors: JAY M. GAMBETTA, Andrew W. Cross, Ali Javadiabhari, Dmitri Maslov
  • Publication number: 20220188680
    Abstract: Systems, computer-implemented methods, and computer program products to facilitate evaluation of quantum circuit optimization routines and knowledge base generation are provided. According to an embodiment, a system can comprise a processor that executes computer executable components stored in memory. The computer executable components can comprise a compilation component that concurrently executes different quantum circuit optimization sequences on multiple copies of a quantum circuit. The computer executable components can further comprise an identification component that identifies at least one of the different quantum circuit optimization sequences that generates an output quantum circuit comprising defined criteria.
    Type: Application
    Filed: December 14, 2020
    Publication date: June 16, 2022
    Inventors: Paul Nation, Ali Javadiabhari, Francisco Jose Martin Fernandez, Ismael Faro Sertage, Jay Michael Gambetta
  • Publication number: 20220188681
    Abstract: Embodiments are provided for compilation of a quantum program. In some embodiments, a system can include a processor that executes computer-executable components stored in memory. The computer-executable components can include an identification component that selects a subgraph that is common among a first commutation directed acyclic graph (DAG) and a second commutation DAG. The subgraph has an upper-bound size that is greater than a threshold size. The first commutation DAG represents a first quantum circuit of a set of quantum circuits and the second commutation DAG represents a second quantum circuit of the set of quantum circuits. The computer-executable components also include a compilation component that compiles a quantum subcircuit corresponding to the subgraph. The computer-executable components further include a configuration component that replaces the quantum subcircuit in the first quantum circuit with the compiled quantum subcircuit.
    Type: Application
    Filed: December 14, 2020
    Publication date: June 16, 2022
    Inventors: Luciano Bello, Ali Javadiabhari, Ji Liu
  • Patent number: 11321625
    Abstract: A hybrid data processing environment comprising a classical computing system and a quantum computing system is configured. A configuration of a first quantum circuit is produced from the classical computing system, the first quantum circuit being executable using the quantum computing system. Using the quantum computing system, the first quantum circuit is executed. Using a pattern recognition technique, a portion of the first quantum circuit that can be transformed using a first transformation operation to satisfy a constraint on the quantum circuit design is identified. The portion is transformed to a second quantum circuit according to the first transformation operation, wherein the first transformation operation comprises reconfiguring a gate in the first quantum circuit such that a qubit used in the gate complies with the constraint on the quantum circuit design while participating in the second quantum circuit. Using the quantum computing system, the second quantum circuit is executed.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: May 3, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jay M. Gambetta, Ismael Faro Sertage, Ali Javadiabhari, Francisco Jose Martin Fernandez, Peng Liu, Marco Pistoia
  • Patent number: 11314908
    Abstract: A repository is configured in a hybrid data processing environment comprising a classical computing system and a quantum computing system, to hold a plurality of quantum circuit components (QCC(s)). A degree of difficulty in simulating the received QCC in the classical computing system is transformed into a classical hardness score. A degree of difficulty in implementing the received QCC in the quantum computing system is transformed into a quantum hardness score. A first parameter in a metadata data structure associated with the received QCC is populated with the classical hardness score. A second parameter in the metadata data structure associated with the received QCC is populated with the quantum hardness score. The received QCC is transformed into a library element by at least augmenting the received QCC with the metadata data structure. The library element is added to the repository.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: April 26, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jay M. Gambetta, Andrew W. Cross, Ali Javadiabhari, Dmitri Maslov
  • Publication number: 20220108201
    Abstract: Techniques for enhancing quantum circuit execution in a quantum service are presented. Database component stores compiled unitaries associated with quantum functions. Unitary management component (UMC) determines whether to compile a unitary associated with a quantum function for storage in the database component based on a composite quality score associated with the unitary and a threshold composite quality score associated with the quantum function, wherein the threshold score can be, or can be based on, a composite quality score of a compiled unitary that performs the same quantum function or a compiled unitary that performs a different quantum function. UMC determines the composite quality score based on a group of factors comprising frequency of utilizing the quantum function or equivalent quantum function or computation, age of the quantum function or computation, difficulty level of compiling a unitary, quantum circuit quality, or error associated with experimental execution of the quantum function.
    Type: Application
    Filed: October 7, 2020
    Publication date: April 7, 2022
    Inventors: Ali Javadiabhari, Dmitri Maslov
  • Publication number: 20220027171
    Abstract: A method includes executing a calibration operation on a set of qubits, in a first iteration, to produce a set of parameters, a first subset of the set of parameters corresponding to a first qubit of the set of qubits, and a second subset of the set of parameters corresponding to a second qubit of the set of qubits. In an embodiment, the method includes selecting the first qubit, responsive to a parameter of the first subset meeting an acceptability criterion. In an embodiment, the method includes forming a quantum gate, responsive to a second parameter of the second subset failing to meet a second acceptability criterion, using the first qubit and a third qubit.
    Type: Application
    Filed: October 11, 2021
    Publication date: January 27, 2022
    Applicant: International Business Machines Corporation
    Inventors: Ali Javadiabhari, Jay M. Gambetta, Andrew W. Cross, David C. Mckay