Patents by Inventor Ali Miri

Ali Miri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240012198
    Abstract: A device for performing unitary matrix computations comprises a light source configured to generate first optical signals; an array of waveguides, including: inputs that receive the first optical signals from the light source; a plurality of channels positioned in parallel for transmitting the first optical signals along a length of the waveguides; and outputs for outputting second optical signals generated according to a matrix multiplication operation from the first optical signals. The device further comprises phase shifters constructed and arranged in a cascade structure at the channels of the waveguides, the waveguides include sections or directional couplers between adjacent phase shifter. The matrix multiplication operation includes coupling coefficient values between adjacent waveguides and length values of the sections of the waveguides. General non-unitary matrix computations are implemented by interlacing two embodiments of the device together with an array of amplitude modulators.
    Type: Application
    Filed: July 11, 2023
    Publication date: January 11, 2024
    Inventors: Mohammad-Ali Miri, Kevin Dagoberto Zelaya Mendoza
  • Publication number: 20150302409
    Abstract: There is provided apparatus, systems and methods that secure payment systems and other financial transaction systems by integrating the location of the transaction into transaction (e.g. payment) authentication processing. One or more methods, apparatus and systems are provided for authenticating a financial transaction made by a payer using a financial transaction processing system such as a payment system. The location of the payer and at least a portion of the financial transaction processing system (e.g. a location of the point of transaction) are verified by an authentication system and confirmed by the payer using a payer communication device.
    Type: Application
    Filed: November 15, 2012
    Publication date: October 22, 2015
    Inventors: Behzad Malek, Ali Miri
  • Patent number: 7991154
    Abstract: A method of scalar multiplication for use in elliptic curve-based cryptosystems (ECC) is provided. Scalars are represented using a generic multibase form combined with the non-adjacency property, which greatly reduces the nonzero density in the representation. The method allows for flexibly selecting an unrestricted number of bases and their weight in the representation according to the particular characteristics of a setting, in such a way that computing costs are minimized. A simple, memory-friendly conversion process from binary to multibase representation and an inexpensive methodology to protect the multibase scalar multiplication against simple-side channel attacks are also provided.
    Type: Grant
    Filed: May 14, 2008
    Date of Patent: August 2, 2011
    Assignee: Univeristy of Castilla-La Mancha
    Inventors: Patrick Longa, Seyed Ali Miri, Luis Orozco Barbosa
  • Patent number: 7991162
    Abstract: A method and apparatus for accelerating scalar multiplication in an elliptic curve cryptosystem (ECC) over prime fields is provided. Multiplication operations within an ECC point operation are identified and modified utilizing an equivalent point representation that inserts multiples of two. Algebraic substitutions of the multiplication operations with squaring operations and other cheaper field operations are performed. Scalar multiplication can also be protected against simple side-channel attacks balancing the number of multiplication operations and squaring operations and providing novel atomic structures to implement the ECC operation. In addition, a new coordinate system is defined to enable more effective operation of ECC to multiprocessor environments.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: August 2, 2011
    Assignee: University of Ottawa
    Inventors: Patrick Longa, Ali Miri
  • Publication number: 20090323933
    Abstract: A method of scalar multiplication for use in elliptic curve-based cryptosystems (ECC) is provided. Scalars are represented using a generic multibase form combined with the non-adjacency property, which greatly reduces the nonzero density in the representation. The method allows for flexibly selecting an unrestricted number of bases and their weight in the representation according to the particular characteristics of a setting, in such a way that computing costs are minimized. A simple, memory-friendly conversion process from binary to multibase representation and an inexpensive methodology to protect the multibase scalar multiplication against simple-side channel attacks are also provided.
    Type: Application
    Filed: May 14, 2008
    Publication date: December 31, 2009
    Inventors: Patrick Longa, Seyed Ali Miri, Luis Orozco Barbosa
  • Publication number: 20090074178
    Abstract: A method and apparatus for accelerating scalar multiplication in an elliptic curve cryptosystem (ECC) over prime fields is provided. Multiplication operations within an ECC point operation are identified and modified utilizing an equivalent point representation that inserts multiples of two. Algebraic substitutions of the multiplication operations with squaring operations and other cheaper field operations are performed. Scalar multiplication can also be protected against simple side-channel attacks balancing the number of multiplication operations and squaring operations and providing novel atomic structures to implement the ECC operation. In addition, a new coordinate system is defined to enable more effective operation of ECC to multiprocessor environments.
    Type: Application
    Filed: September 14, 2007
    Publication date: March 19, 2009
    Applicant: UNIVERSITY OF OTTAWA
    Inventors: Patrick LONGA, Ali MIRI
  • Patent number: 7383547
    Abstract: A device emulator configured to emulate an electronic device to test a computing device. The device emulator includes a plurality of read-write registers that are user configurable to include a set of read registers and a set of write registers, wherein the set of write registers are configured to receive a plurality of requests from the computing device, and wherein the set of read registers are configured to transfer one or more conditional responses of a plurality of conditional responses to the computing device based on the requests; a set of control logic configured to receive the requests from the set of write registers and transfer the conditional responses to the set of read registers; and a circuit device that includes the read-write registers and the set of control logic, wherein the circuit device is configured to operate the control logic to emulate the electronic device.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: June 3, 2008
    Assignee: LeCroy Corporation
    Inventor: Ali Miri