Abstract: Detecting when the on-board power supply is powered on or off by an auto activity detection circuit by determining if the reference clock signal (TCLK) is toggling, and, if the reference clock signal is toggling, then charging a capacitor to a high voltage in the auto activity detection circuit based on the toggling reference clock signal, and outputting an on-board power supply activity signal based upon the high voltage by the auto activity detection circuit indicative of whether or not the on-board power supply is active.

Abstract: A DisplayPort (DP) High-bandwidth Digital Content Protection (HDCP) version converter that converts an HDCP content protection version from input to output includes a receiver and a transmitter. The receiver receives a serial bit stream transmitted from an upstream device, and decrypts link symbols of the received serial bit stream by use of a decryption unit. The transmitter encrypts, by use of an encryption unit, the link symbols decrypted by the receiver, and converts the encrypted link symbols into a serial bit stream and transmits the serial bit stream to a downstream device. The receiver and the transmitter have the same link configuration.

Abstract: A DisplayPort (DP) High-bandwidth Digital Content Protection (HDCP) version converter that converts an HDCP content protection version from input to output includes a receiver and a transmitter. The receiver receives a serial bit stream transmitted from an upstream device, and decrypts link symbols of the received serial bit stream by use of a decryption unit. The transmitter encrypts, by use of an encryption unit, the link symbols decrypted by the receiver, and converts the encrypted link symbols into a serial bit stream and transmits the serial bit stream to a downstream device. The receiver and the transmitter have the same link configuration.

Abstract: Detecting when the on-board power supply is powered on or off by an auto activity detection circuit by determining if the reference clock signal (TCLK) is toggling, and, if the reference clock signal is toggling, then charging a capacitor to a high voltage in the auto activity detection circuit based on the toggling reference clock signal, and outputting an on-board power supply activity signal based upon the high voltage by the auto activity detection circuit indicative of whether or not the on-board power supply is active.

Abstract: Detecting when the on-board power supply is powered on or off by an auto activity detection circuit by determining if the reference clock signal (TCLK) is toggling and if the reference clock signal is toggling, then charging a capacitor to a high voltage in the auto activity detection circuit based on the toggling reference clock signal, and outputting an on-board power supply activity signal based upon the high voltage by the auto activity detection circuit indicative of whether or not the on-board power supply is active.

Abstract: A display controller includes a processor arranged to process executable instructions and associated data, a single memory device for storing the executable instructions and associated data and EDID corresponding to the display device that is always available for access by the data ports and/or the processor regardless of a power state of the display controller, a data buffer for storing EDID read from the memory device, and an arbitration circuit for arbitrating memory device access requests between the processor and a requesting data port wherein when the data buffer is not almost empty, then the arbitration circuit grants the processor access to the memory wherein when the data buffer is almost empty, then the arbitration circuit grants only the requesting data port access to them memory so as to replenish the data buffer with read EDID.

Abstract: A display controller coupled to a display device by way of a display interface and to a host device by way of a data port that includes a processor arranged to process executable instructions and associated data, a single memory device for storing the executable instructions and associated data and EDID corresponding to the display device, and a bridge portion coupling the single memory device to the host device by way of the data port, wherein the bridge portion is always in a powered on state thereby providing access to the single memory device by the host device even when the display controller is in a powered off state such as during a boot up process when the display controller is in the powered off state.

Abstract: A display controller coupled to a display device by way of a display interface and to a host device by way of a data port that includes a processor arranged to process executable instructions and associated data, a single memory device for storing the executable instructions and associated data and EDID corresponding to the display device, and a bridge portion coupling the single memory device to the host device by way of the data port, wherein the bridge portion is always in a powered on state thereby providing access to the single memory device by the host device even when the display controller is in a powered off state such as during a boot up process when the display controller is in the powered off state.

Abstract: In a VESA standard compliant display controller having a processor arranged to process executable instructions and associated data, a memory device arranged to store EDID and the executable instructions and associated data, a number of data ports coupled to the memory device by way of an I2C data bus each coupled to a host device, a method of transferring EDID from the memory device over the I2C data bus to a requesting one of the data ports while servicing a processor memory access request without clock stretching.

Abstract: Detecting when the on-board power supply is powered on or off by an auto activity detection circuit by determining if the reference clock signal (TCLK) is toggling and if the reference clock signal is toggling, then charging a capacitor to a high voltage in the auto activity detection circuit based on the toggling reference clock signal, and outputting an on-board power supply activity signal based upon the high voltage by the auto activity detection circuit indicative of whether or not the on-board power supply is active

Abstract: Managing power in a display controller having an on-board power supply coupled to a host device having an off-board power supply by way of a connector is described. If the on-board power supply is active, then power is supplied to the display controller by the off-board power supply by way of the connector and a low frequency clock arranged to provide a low frequency clock signal is turned on. Alternatively, when it is determined that the on-board power supply is active, then power is supplied to the display controller by the on-board power supply only, the low frequency clock is turned off and a high frequency clock arranged to provide a high frequency clock signal is turned on.

Abstract: Detecting when the on-board power supply is powered on or off by an auto activity detection circuit by determining if the reference clock signal (TCLK) is toggling and if the reference clock signal is toggling, then charging a capacitor to a high voltage in the auto activity detection circuit based on the toggling reference clock signal, and outputting an on-board power supply activity signal based upon the high voltage by the auto activity detection circuit indicative of whether or not the on-board power supply is active.

Abstract: Keys (e.g., decryption key, authentication key) are stored in a non-volatile memory of a display unit. The keys are retrieved in encrypted form into an integrated circuit. The integrated circuit decrypts the keys and uses the keys. As the keys are available in decrypted form only within the integrated circuit and potentially only during use, the keys may not be available to unauthorized third parties.

Abstract: Detecting when the on-board power supply is powered on or off by an auto activity detection circuit by determining if the reference clock signal (TCLK) is toggling and if the reference clock signal is toggling, then charging a capacitor to a high voltage in the auto activity detection circuit based on the toggling reference clock signal, and outputting an on-board power supply activity signal based upon the high voltage by the auto activity detection circuit indicative of whether or not the on-board power supply is active

Abstract: A display controller coupled to a display device by way of a display interface and to a host device by way of a data port that includes a processor arranged to process executable instructions and associated data, a single memory device for storing the executable instructions and associated data and EDID corresponding to the display device, and a bridge portion coupling the single memory device to the host device by way of the data port, wherein the bridge portion is always in a powered on state thereby providing access to the single memory device by the host device even when the display controller is in a powered off state such as during a boot up process when the display controller is in the powered off state.

Abstract: A video controller having a processor for processing executable instructions and associated data and a number of data ports, a method of acquiring extended display identification data (EDID) by a requesting one of the data ports is described. When on-board power supply is activated, an off-board power supply is deactivated and then the now active on-board power supply provides power to a memory device used to store the EDID and the executable instructions and associated data and to an on-board clock circuit capable of providing a high frequency clock signal. The on-board clock circuit, in turn, provides the high frequency clock signal from the on-board clock circuit to the memory device and if a memory read operation had been in progress when the on-board power supply was activated, then the memory read operation is completed.

Abstract: Managing power in a display controller having an on-board power supply coupled to a host device having an off-board power supply by way of a connector is described. If the on-board power supply is active, then power is supplied to the display controller by the off-board power supply by way of the connector and a low frequency clock arranged to provide a low frequency clock signal is turned on. Alternatively, when it is determined that the on-board power supply is active, then power is supplied to the display controller by the on-board power supply only, the low frequency clock is turned off and a high frequency clock arranged to provide a high frequency clock signal is turned on.

Abstract: A display controller coupled to a display device by way of a display interface and to a host device by way of a data port that includes a processor arranged to process executable instructions and associated data, a single memory device for storing the executable instructions and associated data and EDID corresponding to the display device, and a bridge portion coupling the single memory device to the host device by way of the data port, wherein the bridge portion is always in a powered on state thereby providing access to the single memory device by the host device even when the display controller is in a powered off state such as during a boot up process when the display controller is in the powered off state.

Abstract: In a VESA standard compliant display controller having a processor arranged to process executable instructions and associated data, a memory device arranged to store EDID and the executable instructions and associated data, a number of data ports coupled to the memory device by way of an 12C data bus each coupled to a host device, a method of transferring EDID from the memory device over the 12C data bus to a requesting one of the data ports while servicing a processor memory access request without clock stretching.

Abstract: A video controller having a processor for processing executable instructions and associated data and a number of data ports, a method of acquiring extended display identification data (EDID) by a requesting one of the data ports is described. When on-board power supply is activated, an off-board power supply is deactivated and then the now active on-board power supply provides power to a memory device used to store the EDID and the executable instructions and associated data and to an on-board clock circuit capable of providing a high frequency clock signal. The on-board clock circuit, in turn, provides the high frequency clock signal from the on-board clock circuit to the memory device and if a memory read operation had been in progress when the on-board power supply was activated, then the memory read operation is completed.