Abstract: Techniques for providing execution verification at an integrated circuit device are described. The integrated circuit device may include a processor core configured to execute instructions. The integrated circuit device may also include a trace block configured to extract an execution trace from the processor core, the execution trace indicating the instructions that have been executed by the processor core. The integrated circuit device may further include a verification core configured to receive the execution trace from the trace block, extract an address from a control transfer instruction in the execution trace, perform one or more checks on the address, and generate an alarm signal based on the one or more checks.

Abstract: A device includes a general purpose input/output (GPIO) pin and a chipset that has a bootloader component, a secure driver component, and a countermeasure handler component. The bootloader component loads an intrusion detection (ID) configuration for detecting intrusion events at the device, authenticates the ID configuration, and initializes the countermeasure handler component. The secure driver component receives, from the GPIO pin, an electrical signal associated with a hardware interrupt at the device and causes a notification to be provided to a user associated with the device. The counter secure driver component also perform at least one countermeasure in response to the intrusion event.

Abstract: Techniques for providing execution verification at an integrated circuit device are described. The integrated circuit device may include a processor core configured to execute instructions. The integrated circuit device may also include a trace block configured to extract an execution trace from the processor core, the execution trace indicating the instructions that have been executed by the processor core. The integrated circuit device may further include a verification core configured to receive the execution trace from the trace block, extract an address from a control transfer instruction in the execution trace, perform one or more checks on the address, and generate an alarm signal based on the one or more checks.

Abstract: Techniques for providing remote attestation at an integrated circuit device are described. The integrated circuit device may include a memory. The integrated circuit device may also include a write bitmap comprising a bitmap that tracks the write addresses of detected memory write operations to the memory. The integrated circuit device may further include a security subsystem configured to send one or more address ranges of interest to the write bitmap and obtain a bitmap status from the write bitmap indicating that a write address within the one or more address ranges of interest was detected.

Abstract: A method includes organizing a program into blocks based on control flow. The method also includes calculating a plurality of features for each block. The method further includes comparing the calculated features for each block with other blocks and creating a list of equivalent blocks. The method also further includes constructing a list of equivalent program sections utilizing the list of equivalent blocks.

Abstract: Various techniques for matching program sections are described herein. In one example, a method includes organizing a program into blocks based on control flow. The method also includes calculating a plurality of features for each block. The method further includes comparing the calculated features for each block with other blocks and creating a list of equivalent blocks. The method also further includes constructing a list of equivalent program sections utilizing the list of equivalent blocks.

Abstract: An antivibration apparatus for a rotary element, including an active mass vibration absorber actuated by a controller which generates a control signal by extracting harmonics of a rotation frequency of the rotary element. The controller determines a phase shift and an amplification as predetermined functions of the rotation frequency, and applies the phase shift and amplification to the harmonics of the input signal for obtaining the control signal.