Patents by Inventor Ali Sadigh
Ali Sadigh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20220164328Abstract: Some embodiments include computer-implemented method and system operating the method including a first step of receiving input data from an operational historian during a time interval, where the input data is derived from at least a portion of the operational state data. If the time interval has exceeded a specified time interval, then resetting base data values, and outputting stored input data to a computer-readable storage medium of the network. If the time interval has not exceeded a specified time interval, then comparing the input data with base values, and if any of the input data exceeds at least one of the base values, then updating the base values and proceeding to the first step. Further, if any of the input data does not exceed at least one of the base values, then discarding the input data and proceeding to the first step of the method.Type: ApplicationFiled: December 2, 2021Publication date: May 26, 2022Inventors: Vinay T. Kamath, Shiewun Lie, Ali Sadigh, Elliott Scott Middleton, JR.
-
Publication number: 20200081873Abstract: Some embodiments include computer-implemented method and system operating the method including a first step of receiving input data from an operational historian during a time interval, where the input data is derived from at least a portion of the operational state data. If the time interval has exceeded a specified time interval, then resetting base data values, and outputting stored input data to a computer-readable storage medium of the network. If the time interval has not exceeded a specified time interval, then comparing the input data with base values, and if any of the input data exceeds at least one of the base values, then updating the base values and proceeding to the first step. Further, if any of the input data does not exceed at least one of the base values, then discarding the input data and proceeding to the first step of the method.Type: ApplicationFiled: September 10, 2019Publication date: March 12, 2020Inventors: Vinay T. Kamath, Shiewun Lie, Ali Sadigh, Elliott Scott Middleton, JR.
-
Patent number: 8825455Abstract: An on-demand table model for semiconductor device evaluation is provided. A method of providing on-demand table models for semiconductor device evaluation, includes measuring one or more measurement values of an instance of a semiconductor device. The method further includes providing, by a processor, a table model of the instance for the semiconductor device evaluation upon receiving a request for the semiconductor device evaluation. The method further includes generating a table entry in the table model for the one or more measurement values, the table entry including one or more evaluation values of an evaluation function for the instance.Type: GrantFiled: November 4, 2011Date of Patent: September 2, 2014Assignee: International Business Machines CorporationInventors: Calvin J. Bittner, Peter Feldmann, Richard D. Kimmel, Tong Li, Ali Sadigh, David W. Winston
-
Publication number: 20140129202Abstract: Before supplying a series of instructions to a circuit simulator, methods and systems cache the series of instructions and partition the series of instructions into an active portion and an inactive portion. Instead of supplying the entire series of instructions to the circuit simulator, the methods and systems supply only the instructions directed to the active portion of the integrated circuit to the circuit simulator. Thus, the circuit simulator creates a reduced circuit simulation from just the instructions directed to the active portion (instead of a full integrated circuit that would have been simulated with the entire series of instructions). The reduced circuit simulated by these systems and methods has less circuit elements relative to any integrated circuit that would have been simulated with the entire series of instructions. Thus, this reduced circuit is only a portion of the integrated circuit that would have been simulated.Type: ApplicationFiled: November 7, 2012Publication date: May 8, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ali Sadigh, David W. Winston
-
Patent number: 8655634Abstract: A system, method and program product for modeling load effects of a load CCC (channel connected component) in a transistor network. A system is disclosed that includes an analysis system that determines allowable logical state and transition functions for nets in a load CCC for a transition or state of a driving CCC for which a load condition is being determined; a trace system that traverses paths in the load CCC from a set of input terminals; and an element replacement system that replaces circuit elements in the load CCC to create a modeled CCC, wherein a circuit element replacement is based on a type of circuit element encountered along a trace, and state and transition functions of nets connected to an encountered circuit element.Type: GrantFiled: March 10, 2010Date of Patent: February 18, 2014Assignee: International Business Machines CorporationInventors: David J. Hathaway, Vasant Rao, Ronald D. Rose, Ali Sadigh, Jeffrey P. Soreff, David W. Winston
-
Publication number: 20130116985Abstract: An on-demand table model for semiconductor device evaluation is provided. A method of providing on-demand table models for semiconductor device evaluation, includes measuring one or more measurement values of an instance of a semiconductor device. The method further includes providing, by a processor, a table model of the instance for the semiconductor device evaluation upon receiving a request for the semiconductor device evaluation. The method further includes generating a table entry in the table model for the one or more measurement values, the table entry including one or more evaluation values of an evaluation function for the instance.Type: ApplicationFiled: November 4, 2011Publication date: May 9, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Calvin J. BITTNER, Peter FELDMANN, Richard D. KIMMEL, Tong LI, Ali SADIGH, David W. WINSTON
-
Publication number: 20110224965Abstract: A system, method and program product for modeling load effects of a load CCC (channel connected component) in a transistor network. A system is disclosed that includes an analysis system that determines allowable logical state and transition functions for nets in a load CCC for a transition or state of a driving CCC for which a load condition is being determined; a trace system that traverses paths in the load CCC from a set of input terminals; and an element replacement system that replaces circuit elements in the load CCC to create a modeled CCC, wherein a circuit element replacement is based on a type of circuit element encountered along a trace, and state and transition functions of nets connected to an encountered circuit element.Type: ApplicationFiled: March 10, 2010Publication date: September 15, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David J. Hathaway, Vasant Rao, Ronald D. Rose, Ali Sadigh, Jeffrey P. Soreff, David W. Winston
-
Patent number: 7441213Abstract: A method and a system for validating initial conditions (ICs) generally provided by a user when simulating a VLSI circuit are described. Inconsistent ICs sets are detected and replaced by consistent subsets thereof. The method selects the resistance and source values in a Norton or Thevenin circuit used to enforce the IC, and detects when specified ICs are inconsistent while preserving critical or fragile ICs when a two DC-pass approach is used. It further correlates the set of consistent ICs thus obtained with an equivalent circuit and simultaneously provides an input for future use. This allows a user to be notified and given a measure of how bad the inconsistencies are. Detecting inconsistencies is achieved either by measuring the holding current or by measuring the voltage drift if the two DC-pass approach is used.Type: GrantFiled: February 27, 2006Date of Patent: October 21, 2008Assignee: International Business Machines CorporationInventors: Timothy S. Lehner, Richard D. Kimmel, Ali Sadigh, Emrah Acar, Ying Liu, Ivan L. Wemple
-
Publication number: 20070204244Abstract: A method and a system for validating initial conditions (ICs) generally provided by a user when simulating a VLSI circuit are described. Inconsistent ICs sets are detected and replaced by consistent subsets thereof. The method selects the resistance and source values in a Norton or Thevenin circuit used to enforce the IC, and detects when specified ICs are inconsistent while preserving critical or fragile ICs when a two DC-pass approach is used. It further correlates the set of consistent ICs thus obtained with an equivalent circuit and simultaneously provides an input for future use. This allows a user to be notified and given a measure of how bad the inconsistencies are. Detecting inconsistencies is achieved either by measuring the holding current or by measuring the voltage drift if the two DC-pass approach is used.Type: ApplicationFiled: February 27, 2006Publication date: August 30, 2007Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Timothy Lehner, Richard Kimmel, Ali Sadigh, Emrah Acar, Ying Liu, Ivan Wemple