Abstract: In an embodiment, an apparatus includes a first digital beamformer (DBF) associated with a first subset of antennas of a phased array antenna, the first DBF including a transmit section associated with transmission of a first signal at a first frequency in a transmit mode and a receive section associated with receiving of a second signal at a second frequency in a receive mode, the second frequency being different from the first frequency. The apparatus includes a second DBF associated with a second subset of antennas of the phased array antenna. The first and second DBFs are configured to receive a local oscillator signal having the first frequency from a common local oscillator in the transmit mode and receive the local oscillator signal having the second frequency from the common local oscillator in the receive mode.

Abstract: In an embodiment, a receiver included in a communications system is configured to receive a radio frequency (RF) signal from a phased array antenna, the RF signal comprising at least a portion of a plurality of data beams included in a single channel, generate a plurality of channel signals based on the RF signal. Generating the plurality of channel signals includes separating the RF signal into a plurality of channels in which each channel of the plurality of channels includes at least a portion of a respective subset of the plurality of data beams. The receiver is further configured to decode each data beam of the plurality of channel signals with a respective phase and a respective time delay. The receiver is further configured to output the plurality of data beams of the plurality of channels.

Abstract: In an embodiment, a device is included in a communications system, the device including a plurality of antenna elements configured in a phased array antenna; a plurality of integrated circuit (IC) chips, wherein each IC chip of the plurality of IC chips is associated with a respective subset of antenna elements of the plurality of antenna elements, and wherein, for each IC chip of the plurality of IC chips, the associated subset of antenna elements is used for transmitting and receiving radio frequency (RF) signals by the IC chip; and a local oscillator configured to generate a common local oscillator signal and provide the common local oscillator signal to each IC chip of the plurality of IC chips.

Abstract: In an embodiment, a receiver included in a communications system includes a channel extractor configured to segregate a received signal into a plurality of channel signals, wherein the plurality of channel signals includes a plurality of data signals; and a plurality of decoders electrically coupled to the channel extractor and configured to decode each of the plurality of channel signals into a respective plurality of decoded data beam portions.

Abstract: In an embodiment, a receiver included in a communications system includes a channel extractor configured to segregate a received signal into a plurality of channel signals, wherein the plurality of channel signals includes a plurality of data signals; and a plurality of decoders electrically coupled to the channel extractor and configured to decode each of the plurality of channel signals into a respective plurality of decoded data beam portions.

Abstract: In an embodiment, a receiver included in a communications system includes a channel extractor configured to segregate a received signal into a plurality of channel signals, wherein the plurality of channel signals includes a plurality of data signals; and a plurality of decoders electrically coupled to the channel extractor and configured to decode each of the plurality of channel signals into a respective plurality of decoded data beam portions.

Abstract: In an embodiment, a receiver included in a communications system includes a channel extractor configured to segregate a received signal into a plurality of channel signals, wherein the plurality of channel signals includes a plurality of data signals; and a plurality of decoders electrically coupled to the channel extractor and configured to decode each of the plurality of channel signals into a respective plurality of decoded data beam portions.

Abstract: In an embodiment, a receiver included in a communications system includes a channel extractor configured to segregate a received signal into a plurality of channel signals, wherein the plurality of channel signals includes a plurality of data signals; a plurality of phase shifters electrically coupled to the channel extractor and configured to decode each data signal of the plurality of data signals with a respective phase; and a plurality of time delay filters electrically coupled to the plurality of phase shifters and configured to decode each data signal of the plurality of data signals with a respective time delay, wherein the plurality of time delay filters outputs each subset of the plurality of data signals in a respective channel of the plurality of channels.

Abstract: In an embodiment, a device is included in a communications system, the device including a plurality of antenna elements configured in a phased array antenna; a plurality of integrated circuit (IC) chips, wherein each IC chip of the plurality of IC chips is associated with a respective subset of antenna elements of the plurality of antenna elements, and wherein, for each IC chip of the plurality of IC chips, the associated subset of antenna elements is used for transmitting and receiving radio frequency (RF) signals by the IC chip; and a local oscillator configured to generate a common local oscillator signal and provide the common local oscillator signal to each IC chip of the plurality of IC chips.

Abstract: Certain aspects of the present disclosure provide apparatus for producing an output signal having a duty cycle of 50% and a frequency that is one third that of an input signal. One example frequency dividing circuit for producing such an output signal generally includes first and second flip-flops; first, second, and third logic circuits, each configured to function equivalently to a logic OR gate; and an internal frequency dividing circuit configured to generate an output waveform having a frequency that is one half that of an input waveform.

Abstract: Certain aspects of the present disclosure provide apparatus for producing an output signal having a duty cycle of 50% and a frequency that is one third that of an input signal. One example frequency dividing circuit for producing such an output signal generally includes first and second flip-flops; first, second, and third logic circuits, each configured to function equivalently to a logic OR gate; and an internal frequency dividing circuit configured to generate an output waveform having a frequency that is one half that of an input waveform.